aula 2 ch14_aplica+º+úo laplace irwin v. alunos.pdf

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APPLICATION OF THE LAPLACE TRANSFORM TO CIRCUIT ANALYSIS LEARNING GOALS Laplace circuit solutions Showing the usefulness of the Laplace transform Circuit Element Models Transforming circuits into the Laplace domain Analysis Techniques All standard analysis techniques, KVL, KCL, node, loop analysis, Thevenin’s theorem are applicable Prof. Julio Bolacell

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APPLICATION OF THE LAPLACE TRANSFORM

TO CIRCUIT ANALYSIS

LEARNING GOALS

Laplace circuit solutions

Showing the usefulness of the Laplace transform

Circuit Element Models

Transforming circuits into the Laplace domain

Analysis Techniques

All standard analysis techniques, KVL, KCL, node,

loop analysis, Thevenin’s theorem are applicable

Prof. Julio Bolacell

LAPLACE CIRCUIT SOLUTIONS

We compare a conventional approach to solve differential equations with a

technique using the Laplace transform

)()()( tdt

diLtRitvS :KVL

tCC

CC eKtit

dt

diLtRi

)(0)()(

equationary Complement

pC iii

L

ReLKeRK

tC

tC 0)(

pp Kti )(

case thisfor solution Particular

pS RKv 1

tL

R

CeKR

ti

1

)(0000 ) i( for t(t)vS

conditionsboundary Use

0;11

)(

teR

tit

L

R

“Take Laplace transform” of the equation

dt

diLsRIsVS L)()(

)()0()( ssIissIdt

di

L

)()(1

sLsIsRIs

)(

1)(

LsRssI

LRs

K

s

K

sLRs

LsI

/)/(

/1)( 21

RsILRsK

RssIK

LRs

s

1|)()/(

1|)(

/2

01

0;11

)(

teR

tit

L

R

)()()( tdt

diLtRitvS

LInitial conditions

are automatically

included

No need to

search for

particular

or comple-

mentary

solutions

Only algebra

is needed

P

a

r

t

i

c

u

l

a

r

Comple

mentary

LEARNING BY DOING 0),( ttv Find

KCL using Model

dt

dvC

R

vv S

Sv

0

R

vv

dt

dvC S

Svvdt

dvRC

L)()( sVsV

dt

dvRC S

L

)()0()( ssVvssVdt

dv

L

ssVtuv SS

1)()(

0)0(0,0)( vttvSInitial condition

given in implicit

form

In the Laplace domain the differential

equation is now an algebraic equation

ssVsRCsV

1)()(

)/1(

/1

)1(

1)(

RCss

RC

RCsssV

Use partial fractions to determine inverse

RCs

K

s

K

RCss

RCsV

/1)/1(

/1)( 21

1|)()/1(

1|)(

/12

01

RCs

s

sVRCsK

ssVK

0,1)(

tetv RC

t

CIRCUIT ELEMENT MODELS

The method used so far follows the steps:

1. Write the differential equation model

2. Use Laplace transform to convert the model to an algebraic form

For a more efficient approach:

1. Develop s-domain models for circuit elements

2. Draw the “Laplace equivalent circuit” keeping the interconnections and replacing

the elements by their s-domain models

3. Analyze the Laplace equivalent circuit. All usual circuit tools are applicable and all

equations are algebraic.

)()()()( sRIsVtRitv

)()(

)()(

sIti

sVtv

SS

SS

sourcest Independen

...

)()()()(

)()()()(

sBVsItBvti

sAIsVtAitv

CDCD

CDCD

sources Dependent

Resistor

Capacitor: Model 1

)0()(1

)(0

vdxxiC

tvt

)0()()( CvsCsVsI

Source transformation

)0(1

)0(

Cv

Cs

s

v

Ieq

s

vsI

CssV

)0()(

1)(

Impedance in series

with voltage source

Capacitor: Model 2

Impedance in parallel

with current source

s

sIdxxi

t)(

)(0

L

Inductor Models

))0()(()()()( issILsVtdt

diLtv

)0()( issIdt

di

L

s

i

Ls

sVsI

)0()()(

LEARNING BY DOING

Ai 1)0(

Determine the model in the s-domain and the expression for

the voltage across the inductor

Inductor with

initial current

Equivalent circuit in

s-domain

1

1)()(1)(

ssVsIsV

Law sOhm'

)()1(1 sIs :KVL

Steady state for t<0

ANALYSIS TECHNIQUES

All the analysis techniques are applicable in the s-domain

LEARNING EXAMPLE Draw the s-domain equivalent and find the voltage in both

s-domain and time domain

0)0(0,0)( oS vtti

One needs to determine the initial voltage

across the capacitor

1

3)(

ssIS

)(1

||)( sICs

RsV So

1

103

/1

/1)(

1)(

3

sRCs

CsI

CsR

Cs

R

sV So

25.0)1025)(1010( 63 RC

14)1)(4(

120)( 21

s

K

s

K

sssVo

40|)()1(

40|)()4(

12

41

so

so

sVsK

sVsK

)(40)( 4tueetv

tto

LEARNING EXAMPLE Write the loop equations in the s-domain

)0()0()0(

)( 1121 iLs

v

s

vsVA

1 Loop

))()(())()((1

)(1

)( 21121

2

1

1

11 sIsIsLsIsIsC

sIsC

sIR

)()0()0(

)0( 222

11 sViLs

viL B

2 Loop

)()())()((1

))()(( 22212

2

121 sIRsLsIsIsC

sIsIsL

Do not increase

number of loops

LEARNING EXAMPLE Write the node equations in the s-domain

s

ivC

s

isI A

)0()0(

)0()( 2

111

1 VNode

)(1

)(11

21

2

11

21

1 sVsCsL

sVsCsLsL

G

)(1

)(1

1

2

12

2

122 sVsL

sCsVsL

sCsCG

s

ivCvCsIB

)0()0()0()( 2

1122

2 VNode

Do not increase number

of nodes

LEARNING EXAMPLE

theorem. sNorton' and sThevenin' tion,transforma source

ion,superposit analysis, loop analysis, node using Find )(tvo

Assume all initial conditions are zero

Node Analysis

01

)()(12

)(4 1

1

s

sVsV

s

ssV

s

o

1 V@KCL

01

)()(

2

)( 1

s

sVsVsV oo

oKCL@V

s

2

0)()21()(2

124)()()1(

1

21

2

sVsssV

s

ssVssVs

o

o

)1( 2s

s2

2)1(

)3(8)(

s

ssVo

Could have

used voltage

divider here

s

sV

12

)(1

Loop Analysis

ssI

4)(1

1 Loop

ssIsI

ssIsIs

12)(2)(

1))()(( 2212

2 Loop

22)1(

)3(4)(

s

ssI

22)1(

)3(8)(2)(

s

ssIsVo

Source Superposition Applying current source

Current divider

'2I

s

s

ssVo

4

21

2

2)('

Voltage divider

ss

s

sVo

12

12

2)("

2

"'

)1(

)3(8)()()(

s

ssVsVsV

ooo

Applying voltage source

Source Transformation

The resistance is redundant

Combine the sources and use current

divider

2

124

21

2)(ss

ss

ssVo

2)1(

)3(8)(

s

ssVo

Using Thevenin’s Theorem

Reduce this part

s

s

ss

ssVOC

124412)(

Only independent sources

s

ss

sZTh

11 2

s

s

s

ssVo

124

12

2)(

2

Voltage

divider

2)1(

)3(8)(

s

ssVo

Using Norton’s Theorem

2

124/124)(

s

s

s

s

ssISC

Reduce this part

sZTh

2

124

21

2)(s

s

ss

ssVo

2)1(

)3(8)(

s

ssVo

Current

division

LEARNING EXAMPLE zero be to conditions initial all Assume voltagethe Determine ).(tvo

. Three loops, three non-reference nodes

. One voltage source between non-reference

nodes - supernode

. One current source. One loop current known

or supermesh

. If v_2 is known, v_o can be obtained with a

voltage divider

Selecting the analysis technique:

Transforming the circuit to s-domain

ssVsV

12)()( 12 :constraint Supernode

01

)()(2

/2

)(

2

)( 211

s

sVsI

s

sVsV :supernode KCL@

2

)()( 1 sV

sI : variablegControllin

)(1

1)( 20 sV

ssV

:divider Voltage

ssVsV /12)()( 21 :algebra the Doing

ssVsI /62/)()( 2

0)1/()(

)/62/)((2/12)()1)(2/1(

2

22

ssV

ssVssVs

)54(

)3)(1(12)(

22

sss

sssV

)54(

)3(12)(

2

sss

ssVo

Continued ... theorem sThevenin' using Compute )(sVo

-keep dependent source and controlling

variable in the same sub-circuit

-Make sub-circuit to be reduced as simple

as possible

-Try to leave a simple voltage divider after

reduction to Thevenin equivalent

sVOC /12

2

/12'

0'2/2

/12

2

/12

sVI

Is

sVsV

OC

OCOC

ssVOC

12)(

0'0'2)/2/()'2(' IIsII

0)/2/("2""2 sIIIISC

s/12

sI /6"

s

sISC

)3(6 3

2

)(

)(

ssI

sVZ

SC

OCTH

s

ss

sVo

12

3

21

1)(

Continued … Computing the inverse Laplace transform

Analysis in the s-domain has established that the Laplace transform of the

output voltage is

)54(

)3(12)(

2

sss

ssVo

)12)(12(542jsjsss

)12()12()12)(12(

)3(12)(

*11

js

K

js

K

s

K

jsjss

ssV o

o

)()cos(||2)()(

11

*11 tuKteK

js

K

js

K t

5

36|)( 0 soo ssVK

57.16179.343.19879.3

)902(43.1535

45212

)2)(12(

)11(1212

|)()12(1 jj

j

jss

oVjsK

)(57.161cos(59.75

36)( 2

tutetvt

o

1)2( 2 s

1)2(1)2(

)2(

12

)3(12)(

22

21

2

s

C

s

sC

s

C

ss

ssV o

o

)(]sincos[)()(

)(2122

222

1 tutCtCes

C

s

sC t

5/36|)( 0 soo ssVC

])2([)1)2(()3(12 212

CsCssCs o 5/12610/362122 22 CCCs o

5/360: 11 CCCo2s of tscoefficien Equating

)(sin5

12)cos1(

5

36)( 22

tutetetvtt

o

One can also use

quadratic factors...

LEARNING EXTENSION equations node using Find )(tio

supernode

oVSo VV

Assume zero initial conditions

Implicit circuit transformation to s-domain SV

KCL at supernode

02

)()(2))()((

sV

Ls

sV

ssVsVCs oo

So

2

)()(,

12)(

sVsI

ssV o

oS

16

15

4

1

61

15.0

61)(

22

s

s

ss

ssIo

algebra the Doing

4

15

4

1

4

15

4

1

4

15

4

1

4

15

4

1

61)(

*

1 1

js

K

js

K

jsjs

ssIo

)()cos(||2)()(

11

*11 tuKteK

js

K

js

K t

4

152

4

15

4

161

|)(4

15

4

1

4

15

4

11

j

j

sIjsKjs

o

72.15653.6

9097.0

72.6633.61K

72.1564

15cos06.13)( 4 teti

t

o

LEARNING EXTENSION equations loop using Find )(tvo

supermesh

12

2II

s

source to due constraint

0212

21

2211 Is

sIIIs

supermesh onKVL

Solve for I2

)73.3)(27.0(

216

)14(

216)(

22

sss

s

sss

ssI

73.327.0)( 210

2

s

K

s

K

s

KsI

2|)( 020 sssIK

48.2)73.327.0)(27.0(

2)27.0(16|)()27.0( 27.021

ssIsK

47.4)27.073.3)(73.3(

2)73.3(16|)()73.3( 73.322

ssIsK

)(2)(

)(47.448.22)(

2

73.327.02

titv

tueeti

o

tt

Determine inverse transform

TRANSIENT CIRCUIT ANALYSIS USING LAPLACE TRANSFORM

For the study of transients, especially transients due to switching, it is important

to determine initial conditions. For this determination, one relies on the properties:

1. Voltage across capacitors cannot change discontinuously

2. Current through inductors cannot change discontinuously

LEARNING EXAMPLE 0),( ttvo Determine

AiVv LC 1)0(,1)0(

itshortcircu are inductors

circuit open are capacitors case DCFor

Assume steady state for t<0 and determine

voltage across capacitors and currents

through inductors

)0( Li

)0(Cv

Circuit for t>0

Use mesh analysis

Laplace

14

)1( 21 s

sIIs

11

)2

1( 21 s

Is

ssI

Solve for I2 s

)1( s

232

12)(

22

ss

ssI

ssI

ssVo

1)(

2)( 2

232

72)(

2

ss

ssVo

Now determine the inverse transform

roots conjugatecomplex 042acb

4

7

4

3

4

7

4

3)(

*

1 1

js

K

js

KsVo

4

7

4

31 )(

4

7

4

3

js

o sVjsK

5.7614.2

)()cos(||2)()(

11

*11 tuKteK

js

K

js

K t

)5.764

7cos(28.4)( ttvo

Circuit for t>0

LEARNING EXTENSION 0),(1 tti Determine

Initial current through inductor

Aii LL 1)0()0(

12

6 s2s

1)(1 sI

ss

ssI

1

182

2)(1

Current

divider

)()(9

)( 911 tueti

s

ssI

t

LEARNING EXTENSION 0),( ttvo Determine

Determine initial current through inductor

)0(LiUse source

superposition

Ai V 212

Ai V3

24

AiL3

4)0(

s2

V3

8

)(sVo

divider) (voltage

3

812

24

2)(

sssVo

)2(3

)368()(

ss

ssVo

2

21

s

K

s

K

6|)( 01 so ssVK

3

10|)()2( 22 so sVsK

)(3

86)( 2

tuetvt

o