tutorial de criação de componente multisim_3173

8/7/2019 tutorial de criao de componente multisim_3173

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Creating a Custom Component in NI MultisimOverviewNI Multisim and NI Ultiboard provide an integrated platform to design, simulate and layout a complete

Printed Circuit Board (PCB). The highly flexible Database Manager makes it easy to add a new SPICE

simulation model to a custom defined schematic symbol which can then transfer an accurate footprint to

layout.

Creating a Custom Component in NI Multisim and Creating a Custom Component in NI Ultiboard are your

resources on how to intuitively and quickly learn how to create your own custom components.

Introduction

This tutorial is the first in a series of articles on component creation in NI Multisim and NI Ultiboard.

The purpose of this tutorial is to explain how you can create your own components for simulation and/or

Printed Circuit Board (PCB) layout from within Multisim. You will create the component and then verify its

operation. The Component Wizard is the primary tool used to create custom components in Multisim, and it

walks you through all of the steps required to create a new component. Components details include symbol

and optionally pin, model, and footprint information. Steps in the creation process include:

Entering component information.

Selecting a footprint and the component configuration.

Selecting and/or editing the component symbol.

Setting pin parameters.

Mapping the symbol pins to the footprint pins.

Selecting the simulation model.

Mapping the symbol pins to the model pins.

Saving the part in the database.

The tutorial steps you through the process of creating a simulation and PCB layout compatible component in

Multisim. In the interest of completeness, you will learn how to create an advanced component with two

sections. You will create a part with two schematic symbols, two models, but only one footprint. Many

components are easier to create and not all steps outlined are required under most circumstances. Multisim

also allows users to create simulation-only or layout-only components.

Part 2 of the component creation articles, entitled Creating a Custom Component in NI Ultiboard, outlines

how to create a custom Ultiboard land pattern for layout. This land pattern is created manually so as to

precisely define the shape, size, and dimensions of a Surface Mount Device (SMD). This footprint can be

added to the Multisim database to define a custom component.

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Single Section versus Multi-section Components

A single-section component is any component that has a single device per chip. A multi-section component

is a component that has multiple gates or devices per chip. Examples of multi-section devices include logic

gates or operational amplifiers. Letters, increasing from A-Z, enumerate the devices within multi-section

components.

Simulation-only Components

Simulation-only components are designed to help verify designs; they are not transferred to board layout.

There is no footprint information associated with them, and their symbols are colored black by default in the

Multisim environment to easily identify them. An example of a simulation-only component is an ideal voltage

source.

Layout-only Components

Layout-only components do not contribute to a simulation. They have no associated SPICE or behavior

model. When connected parallel to the circuit, they will have no impact on the simulation. When connected in

series, they will create an open circuit. Layout-only components are green on the Multisim environment. An

example of a Layout-only component is a connector.

Creating a Texas Instruments THS7001 Component in NI Multisim

The Texas Instruments THS7001 is an example of a multi-section component. This component has a

programmable gain amplifier (PGA) with a separate pre-amplification stage presented in a single integrated

circuit (IC) package. In this package, both sections share power and reference voltage connections. The

programmable gain is digitally controlled via three TTL-compatible inputs. For more details about this

component refer to the file datasheet_ths7001.pdf located in the Downloads section.

In the next steps, you will learn to use the Component Wizard to create the THS7001 in Multisim.

Step 1: Enter Initial Component Information1. Select ToolsComponent Wizard from the Multisim main menu. The Component Wizard window opens.

2. Configure this window as shown in the following figure.

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Enter component information

Component n~me: Function:

ITHS7001 70-MHz Programmable-GainAmplifier

author name:

}~ :~ : (~ I ( q : 6 : : ~~~ : i~ : ; : q :~ :~ : : (~~~~ i : : ~h :~ : : f . ~~~p .~ !a Simulation only (model)a !:_ayoutonly (footprint)a Simulation and ~LDexport (model and VHDLexport)Component type:

IAnalog

[ r::!ext > ] [ ~ancel ] ~'--[t:!_elp_ _ _ _ J ] .. ..

Figure 1. THS7001 component information.

1. Click Next to continue.

Step 2: Enter Footprint and Package Information

In this step you will enter the footprint information. According to the datasheet, this component uses the

HTSSOP-20 PowerPAD (PWP) footprint. You will select this footprint from the Multisim Master Database.

1. Click on the Select a footprint button. The Select a Footprint window opens.

2. Select the Master Database in the Database name listbox.

3. Click Filter. This helps you do a quick search within the thousands of footprints.

4. Click the Add row button.

5. Configure the Filter window as shown in Figure 2.

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f'" Filter

Filter list:

NO, I Column I Operator I Value[T F o o t p r in t C o n t ;3 in s H T "S S Q "p ~ :

~r~ ~IKt ~ancel J

t add rowJt Q.elete row It CI~ar FilterJ

Figure 2. Filtering footprints.

1. Click OK. The Select a Footprint window displays a list of footprints as shown in the following figure.

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Database name: Master DatabaseCorpor ate DatabaseUser Database

Filter on

Eilter

Data list:

NO, I Manufacturer I Footprint I Pi", I SMT/TH I Standard pinout I Ultibo1 Texas Instruments HTSSOP-14(PWP) 14 SMT 1;2;3;4;5;6;7;8;9; 10; 11. SOP651

:2 " T " e "X " i;s " i" n s tr um e n t s HT S S O P~ 2 0 ( PW P ) 2"6 s " i~ T " i; 2 ; 3 ; 4 ; 5 ; 6 ; 7 ; 8 ; 9I~ ___,

3 IPC-7351 HTSSOP-28 28 SMT 1;2;3;4;5;6;7;8;9; 10; 11. TSOP6!

4 Texas Instruments HTSSOP-28(PWP) 28 SMT 1;2;3;4;5;6;7;8;9; 10; 11. TSSOPI

5

6

IPC-7351

IPC-7351

HTSSOP-PWP-14 14

HTSSOP-PWP-20 20

SMT

SMT

1;2;3;4;5;6;7;8;9; 10; 11. TSOP6!

1;2;3;4;5;6;7;8;9; 10; 11. TSOP6!

11! i l I , , 1111 .1 rn[ add II Q.elete [ b_inknfo

1l :2_ave [ Copy to 1

~=---:2_e_l_ec_t-==~ ~ancel 1 .._ [_ti_e_lp ___;;,

Figure 3. Selecting the HTSSOP-20(PWP) footprint.

1. Highlight the footprint HTSSOP-20(PWP) and click Select.

Note: To learn how to create a custom footprint in NI Ultiboard take a look at the Creating a Custom

Component in NI Ultiboard tutorial.

Now you need to define the number of sections and pins in the component. In this case there are two

sections: A is the pre-amplifier section, it contains 7 pins; and B is the programmable gain amplifier section, it

contains 12 pins.

1. Configure the multi-section parameters as shown in Figures 4a and 4b.

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Enter footprint information

Footprint manufacturer: 1Texas InstrumentsFootprint type: 1 HTSSOP-20(PWP)

t :2_elect a footprintJ

1Single section component M!d.lti-sectioncomponent

Number of sections: ,-I 2 - - - - ' - '~~=1Total number of l2_ins: 1 '-9 --- - 'Section details:

A I B

Name: IA INumber of pins: :=1 ,__7 : : :~~~ : ; : ;1=~~; ; ; -1 - - - - - - - - - -

[ < ~ack ] [[1ext > ~] ~ ~ancel ] ~'--[t:!_elp_ _ _ _ J] .. ..

(a)

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load symbol fi les into the Symbol Editor.

1. Click the Edit button. The Symbol Editor opens.

2. Select FileOpen and select the file pre_amp.sym, this file can be found in the Downloads section. The

Symbol Editor loads the symbol for the pre-amplifier as show in the following figure:

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r " l I ~ r i a J ~ tSyro be I. Edite rEile ~dit :iiew ~ins ~raphics b_ayout lools

t:!elp

[j ~ m_ I d b~elm ~I 19Q111 [ l ~~ @ 4E illIto , o


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symbol will now be displayed in the preview box (Figure 6).

If you plan to share this component with colleagues around the world, it is a good idea to create both ANSI

and DIN symbols for the device. In this case, simply click on the Copy to button, then select Section A (DIN).

,..;;, ~rom po nent Wiza ,r d - S tep J of 8... "..""Enter symbol information

Symbol set [f Idi t

ANSIJ I# 1# ~ C0l2.yfrom DB J~ + ------------

ODIN~ Copy to", J

~~

I

2_ection: A IB I

[ < ~ack ] ~ r::!ext> ] [ ~ancel ] [ t:!elp ] .. ..Figure 6. Pre-amplifier symbol.

Assign a symbol for the programmable gain amplifier section:

1. Select B in the Section field.

2. Click on Edit to open the Symbol Editor.

3. Open the file pg_amp.sym located in the Downloads section.

4. Select FileExit to close the Symbol Editor, if asked to save changes choose Yes. The pre-amplifier

symbol will now be displayed in the preview box as shown below:

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Enter symbol information

Symbol set [ Id i t

lANSI

~ J1 r T C0l2.yfrom DB

":1 :j

ODIN~ c : _o_oo . ; r -'c" ~ Copy to". J. . . . . . . IN "OJ]" ---~.P . . . . . ." ~

!" '~ . . ~Il t l {

2_ection: A B I

[ < ~ack J r r::!ext> 1 [ ~ancel 1 [ t:!elp J .. ..Figure 7. Programmable gain amplifier symbol.


Step 4: Set Pin Parameters

In this step you can select the pin model type (input, output, and so on) for each pin in the symbol. You can

also configure whether to include or exclude that pin from Electrical Rules Check (ERC). If needed, you can

add hidden pins to components in this step. Hidden pins are pins that do not appear on the symbol but may

be used by the model and/or the footprint.

1. Configure the Section and Type columns as shown in the following figure:

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S e t p in p arame te rs

~ in ta ble : t Add hidden pin J Q elete hidden pinS ymbo l pins I Sect ion Type I ERC s ta tu s

+IN_PA A INPUT INCLUDE

-IN_PA A INPUT INCLUDE

-VCC_PA A PWR INCLUDE

+VCC_PA A PWR INCLUDE

OUT_PA A OUTPUT INCLUDE

SHDN COM INPUT INCLUDE

GND COM GND INCLUDE

VIN- B INPUT INCLUDE

VCC+ B PWR INCLUDE

VCC- B PWR INCLUDE

REF B INPUT INCLUDE

SHDN COM INPUT INCLUDEGO B INPUT INCLUDE

Gl B INPUT INCLUDE

G2 B INPUT INCLUDE

GND COM GND INCLUDE

CLAMP- B INPUT INCLUDE

CLAMP+ B INPUT INCLUDE

OUT B OUTPUT INCLUDE


Figure 8. Pin parameters.

Step 5: Set Mapping Information between Symbol and Layout Footprint

Map visible symbol pins and hidden pins to the PCB footprint. Ensure that the mapping is accurate by

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comparing it to the datasheet information.

Note: Simulation-only parts do not require this step.

1. Click the corresponding Footprint pins cell for each row and assign a pin number. The configured window

will look like Figure 9. Note that pins 1 and 17 shared pins .

. .,Component Wizit,rd - Step 5 of 8

'"

2_etmapping information between symbol and layout footprint

Symbol pins I Footprint pins+IN_PA 6-IN_PA 5

-VCC_PA 7

+VCC_PA 8

OUT_PA 4

SHDN 17

GND 1

VIN- 3

VCC+ 13

VCC- 14

REF 2

SHDN 17

GO 20

G1 19

G2 18

GND 1

CLAMP- 15

CLAMP+ 12~ .~OUT 16

~ ~"-[M_a_p_Pi_ns_...JJ1 11

[ < ~ackJ [r::!ext > ] [ ~ancel 1 ~ "--[t:!_elp_ _ _ _ JJ .. ..

Figure 9. Mapping information between symbol and layout.

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Step 6: Select the Simulation Model

When creating a component for simulation, you must provide the simulation models for each section. You

can obtain or create new models in four ways:

Download a SPICE model from a manufacturer website or other source.

Manually create a subcircuit or primitive model.

Use a Multisim Model Maker.

Or edit an existing model.

Multisim provides Model Makers that create SPICE models for several categories of components based on

their databook values. Model Makers exist for operational amplifiers, bipolar junction transistors, diodes,

waveguides, and many others. For more information on the various Model Makers, consult the Multisim help

file.

For the THS7001, you will use manufacture-provided SPICE compatible models. There are separate models

for the pre-amplifier and the programmable gain amplifier sections. They can be found in the Downloads

section.

Note: If you are creating a layout-only component, you are not required to complete steps 6 and 7.

1. Select the A tab in the Section field.

2. Click on Load from file.

3. Open the file ths7001_preamp.cir located in the Downloads section. The SPICE model for the

pre-amplifier will load and be displayed in the tab for section A as shown below:

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~ Select from DB J

~ Copy to", J

MQdel name: ITHS700 i_PRE I r..."L "o ,3 "cH r 0 m ..f"ile.......]Model Qata: L.....- __. ~ [1odel maker J

Select simulation model

IB I~ction:

Figure 10. SPICE model for the pre-amplifier section.

1. Select the B tab in the Section field.

2. Click on Load from file.

3. Open the file ths7001_pga.cir located in the Downloads section. The SPICE model for the programmable

gain amplifier will be loaded.


* CONNECTIONS: NON -INVERTING INPUT a* I

INVERTING INPUT* I I POSITIVE POWER SUPPLY* I I I NEGATIVE POWER SUPPLY

~I I I I OUTPUT* I I I I I SHUTDOWN* I I I I I I DGND* I I I I I I I. SUBCKT THS7001_PRE1 2 3 4 567** ShutdownR_SHDN 6 SHDN 1mR_S76 6 7 3383S76 3000 7 SHDN 7 S_TRUES77 3 3000 SHDN 7 S_SHDN_FALSES78 4 4000 SHDN 7 S SHDN FALSE

~_ _

~J 1111 .1 rn

[ < ~ack ] ~ [iext > ] [ ~ancel ] [ tielp ]. .

You must map the symbol pins to the SPICE model nodes in order for Multisim to correctly simulate the

component. For all subcircuit or macro models, the model nodes are typically documented in the header text

Step 7: Map Symbol Pins to the Model Nodes

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of the SPICE model. There is also a line that declares that the model is a subcircuit model and lists themodel name followed by the model nodes that will connect to external circuitry.

For the THS7001, the model nodes of the pre-amplifier and the programmable gain amplifier are listed in the

files ths7001_pga.cir and ths7001_pga.cir, respectively. You can open these files in a text editor.

Let us examine the header and subcircuit (SUBCKT) lines for the pre-amplifier:

1; CONNECTIONS: N.oN-INVERTING INPUT1; INVERTING INPUT1;

IP.oSITIVE P.oWER SUPPLY

1; I I NEGATIVE P.oWER SUPPLY1; I I I .oUTPUT1; I I I I SHUTDOWN1; I I I I I DGND1; I I I I I I.SUBCKT THS7001 PRE 1 2 3 4 5 6 7

The .SUBCKT line declares that the model is a subcircuit model, lists the name of the model, and displays

the external nodes. The comment lines (SHUTDOWN, OUTPUT, and so on) describe the order and

operation of the model nodes.

1. Complete the pin mapping table for the pre-amplifier (section A) as shown in Figure 11. You must select

the Model nodes based on the order in which they appear in the SUBCKT line.

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S et m apping info rm atio n between symbo l and simulatio n m odel ( The sy mbo l must co ntainat least as many pins as the model has co nnectio n po ints.)

S~ct ion: A B IP in m ap pin g tab le : S y mbo l pins I Model n ode s

VIN- 2

VCC+ 3

VCC- 4R E F 1

SHDN 6

GO 7

Gl 8

G2 9

GND 12

CLAMP- 11

CLAMP+ 10OUT 5

~'-[_


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3. Click Add Family and type Amplifiers as the new family name.

4. Click OK.

5. Highlight the new Amplifiers family as shown below:

Family tree:

B 8 User DatabaseUlticap

Sources

Basic

Diodes

Trensis tors

Analog: : :

L. . . . . .D.1 :Amplifiers :;. ;

. . . . .a TTL......~ CMOS

" 0 "

Database: IUserDatabase

Group: IAnalog

Family: ~.--m-p:-:lif:-ie-rs--------

Family

D@ANSI ODIN

add family

~ e.lacethis component

< ~ack ~ancel I._[ti_e_lp_-"l.inish =- : J

Figure 13. Saving the component to the database.

1. Click Finish and place your custom component (Sections A and B) on the Multisim workspace area.

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THS1001. ; ." : : '/ . .::. . . : :. . ,"M 0 O'J CO

8 17U1A + 0 M N U1B. u 1 : .9 1 : .9 1 : .9

u4 := - CLAMP+

3 VIN- OUTCLAMP-

I : ; : : ;U A A Ii.!U : :r: : : ; : : ; ~

7 1 := - lI1 1: .9 p: : ;

Figure 14. THS7001 Sections A and B.

Testing the New Component in Multisim

After creating and saving the custom component, it is available for use in Multisim. To test this component,

use the test_circuit.ms11 file located in the Downloads section. Replace U2A with section A of your newcomponent and replace U2B with section B. To replace a component, double-click on the component and

then select Replace. Then navigate to the database and location that you saved your component and select

it.

Figure 15 il lustrates the expected response of the test circuit.

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