macos serverpadley.rice.edu/cms/odmb/odmb_schematic_final.pdf · 19 c_vme_ga p3v3 p5v fuse_5a...

11
19 C_VME_GA<4..0> P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V P3V3_PP 4.7uF P3V3 REG_P3V3 C_VME_AM<5..0> VME_DATA<15..0> C_VME_ADDR<23..1> P5V REG_P3V3 4.7uF VME_LWORD_B VME_BG3 SIZE=10 SIZE=9 0 C_VME_SYSFAIL_B C_VME_CLK C_VME_BG3 VME_BG0 VME_IACK_B VME_WRITE_B 1.20uH C_VME_DS1_B C_VME_DS0_B C_VME_AS_B VCCB=P5V;VCCA=P2V5 12 330uF_LESR0018 VME_P5V VCCB=P5V;VCCA=P2V5 74ALVC164245DL LV_P3V3 VME_P3V3 74ALVC164245DL C_VME_AM<5..0> 12 9 VME_BG1 VME_SYSFAIL_OUT 2N7002 C_VME_BG1 VME_BERR_OUT 14 VME_DIR VME_OE_B 100k 7 11 SSOP 13 VME_BERR_B S-PAK-7 100NF SIZE=8 SIZE=4 10uF P5V 100NF 10uF C_VME_GAP 12 VME_DS1_B VME_SYSRESET_B VCCB=P5V;VCCA=P2V5 11 7 10K 10K 3 0 13 10K 15 11 8 10K 13 14 15 9 6 4 5 1 2 6 4 5 2 3 1 C_VME_GA<4..0> 4 10K 10K 10K P3V3 10K 10K 3 1 0 SSOP 4 10K 1 4 2 16 VME_CLK 0 15 16 14 VME_AS_B 15 23 3 SSOP 22 2 2 0 2 0 11 22 12 3 9 5 4 3 1 2 20 17 16 14 11 8 7 5 10 13 21 15 12 0 0 5 10 8 8 6 5 7 3 1 2 14 15 11 10 9 21 20 19 18 17 3 1 4 5 7 6 1 3 4 10 17 1 2 3 5 4 19 4 18 20 21 22 5 2 12 13 18 1 7 1 3 4 13 VME_DS0_B 3 10K P3V3 P3V3 6 2 2 23 4 74ALVC164245DL P3V3 9 VCCB=P5V;VCCA=P2V5 2N7002 9 10 14 0 1 SSOP 0 8 10K MOUNTED=NO MOUNTED=NO 100NF 100NF P5V FUSE_1A 330uF_LESR0018 5.6k 10nF 100NF 4.7uF 1k FUSE_1A 10uF MIC69502WR FUSE_8A 1 VME_BG2 VME_GA<4..0> 6 VME_SYSFAIL_B 74ALVC164245DL 23 VME_AM<5..0> 4 3 8 VME_ADDR<23..1> for M2.5 screw BN678-8303525 M2.5 L=10mm BN5687-3061600 2x P3V3=VME_P3V3;VCC=VME_P5V SIZE=4 P5V C_VME_DS0_B C_VME_DS1_B C_VME_DATA<15..0> C_VME_BG2 C_VME_BG0 10 J6 B31 A30 A29 A28 A27 A26 A25 A24 C30 C29 C28 C27 C26 C25 C24 C23 C22 C21 C20 C19 C18 C17 C16 C15 B3 B16 B17 B18 B19 A23 C14 A18 B1 B2 C11 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 B14 B15 A1 A2 A3 A4 A5 A6 A7 A8 C1 C2 C3 C4 C5 C6 C7 C8 A13 A12 A16 D10 D11 D13 D15 D17 D9 A20 A21 A22 B30 B29 B28 B27 B26 B25 B24 D27 D29 C13 Z3 Z9 Z7 Z1 Z5 D6 D7 D3 D4 Z11 Z13 Z15 D23 D25 Z17 Z19 Z21 Z23 Z25 Z27 D19 D21 D5 D8 Z31 Z29 B21 A10 C10 C12 D1 D32 A14 IC30 47 46 44 41 40 38 37 2 3 5 6 8 9 11 12 1 48 36 35 33 32 30 29 27 26 13 14 16 17 19 20 22 23 24 25 IC7 47 46 44 43 41 40 38 37 2 3 5 6 8 9 11 12 1 48 36 35 33 32 30 29 27 26 13 14 16 17 19 20 22 23 24 25 IC20 47 46 44 43 41 40 38 37 2 3 5 6 8 9 11 12 1 48 36 35 33 32 30 29 27 26 13 14 16 17 19 20 22 23 24 25 IC13 47 46 44 43 41 40 38 37 2 3 5 8 9 11 12 1 48 36 35 33 32 30 29 27 26 13 14 16 17 19 20 22 23 24 25 FH2 1 2 FH4 1 2 FH3 1 2 R22 R16 R19 R20 R21 R15 T2 3 1 2 T3 3 1 2 J9 123 J10 123 R12 R8 TP5 TP4 R14 R18 RG1 7 1 2 3 5 6 R85 R86 R84 C17 C15 C20 L1 1 2 C18 C19 FH1 1 2 R7 R13 C8 C9 TP1 TP2 C21 C16 ST1 SH1 SH2 ST2 ST3 SH3 ST4 SH4 ST5 SH5 ST6 SH6 C_VME_AS_B 6 43 C_VME_IACK_B C_VME_DTACK_B C_VME_WRITE_B C_VME_LWORD_B C_VME_BERR_B C_VME_SYSRESET_B C_VME_DATA<15..0> B22 C_VME_ADDR<23..1> 2 PROJECT:O-DMB EDA-02415-V2-0 MODULE:o_dmb Design by: G. Magazzu SYSTEM: Cadence SPB16.3 1/11 DATE: 12/12/12 PCB by: JMC Project file:o_dmb.cpm LAST_MODIFIED=Mon Feb 18 18:12:58 2013 1/11

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Page 1: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

19C_VME_GA<4..0>

P3V3

P5V

FUSE_5A

P5V_LVMB

for M2.5 screwBN629-1348426

2x

2x

BORNIER3

BORNIER3

VME_P3V3 VME_P5V

P3V3_PP

4.7uF

P3V3REG_P3V3

C_VME_AM<5..0>

VME_DATA<15..0>

C_VME_ADDR<23..1>

P5V

REG_P3V3

4.7uF

VME_LWORD_B

VME_BG3

SIZE=10

SIZE=9

0

C_VME_SYSFAIL_BC_VME_CLK

C_VME_BG3

VME_BG0VME_IACK_BVME_WRITE_B

1.20uH

C_VME_DS1_BC_VME_DS0_BC_VME_AS_B

VCCB=P5V;VCCA=P2V5

12

330uF_LESR0018

VME_P5V

VCCB=P5V;VCCA=P2V574ALVC164245DL

LV_P3V3VME_P3V3

74ALVC164245DL

C_VME_AM<5..0>

12 9

VME_BG1

VME_SYSFAIL_OUT2N7002C_VME_BG1

VME_BERR_OUT

14

VME_DIR

VME_OE_B

100k

7

11

SSOP

13

VME_BERR_B

S-PAK-7

100NF

SIZE=8

SIZE=4

10uF

P5V

100NF

10uF

C_VME_GAP

12

VME_DS1_B

VME_SYSRESET_B

VCCB=P5V;VCCA=P2V5

11

7

10K

10K

3

0

13

10K

15

11

8

10K

131415

9

6

45

12

6

45

23

1

C_VME_GA<4..0>

4

10K

10K

10K

P3V3

10K

10K

3

10

SSOP

4

10K

1

4

2

16

VME_CLK

0

1516

14

VME_AS_B

15

23

3

SSOP

22

2

2

0

2

0

11

22

12

3

9

543

12

20

1716

14

11

87

5

10

13

21

15

12

0

0

5

10

8

8

65

7

3

12

1415

11109

2120191817

3

1

45

76

1

34

10

17

123

54

19

4

18

202122

5

2

1213

18

1

7

1

3

4

13

VME_DS0_B

3

10K

P3V3

P3V3

6

2

2

23

4

74ALVC164245DL

P3V3

9

VCCB=P5V;VCCA=P2V5

2N7002

910

14

0

1

SSOP

0

8

10K

MOUNTED=NO

MOUNTED=NO

100NF

100NF

P5V

FUSE_1A

330uF_LESR0018

5.6k

10nF

100NF

4.7uF

1k

FUSE_1A

10uF

MIC69502WRFUSE_8A

1

VME_BG2

VME_GA<4..0>

6

VME_SYSFAIL_B74ALVC164245DL

23

VME_AM<5..0>

4

3

8

VME_ADDR<23..1>

for M2.5 screwBN678-8303525

M2.5 L=10mmBN5687-3061600

2x

P3V3=VME_P3V3;VCC=VME_P5V

SIZE=4

P5V

C_VME_DS0_BC_VME_DS1_B

C_VME_DATA<15..0>

C_VME_BG2

C_VME_BG0

10

J6

B31

A30A29A28A27A26A25A24C30C29C28C27C26C25C24C23C22C21C20C19C18C17C16C15

B3

B16B17B18B19A23C14

A18

B1B2

C11

B4B5B6B7B8B9B10B11

B12B13B14B15

A1A2A3A4A5A6A7A8C1C2C3C4C5C6C7C8

A13A12

A16

D10D11D13D15D17

D9

A20A21A22

B30B29B28B27B26B25B24

D27D29

C13

Z3

Z9Z7

Z1

Z5

D6D7

D3D4

Z11

Z13Z15

D23D25

Z17Z19Z21Z23Z25Z27D19D21

D5D8

Z31Z29

B21

A10C10C12

D1D32

A14

IC30

474644

41403837

2356891112

148

3635333230292726

1314161719202223

2425

IC7

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

IC20

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

IC13

4746444341403837

235

89

1112

148

3635333230292726

1314161719202223

2425

FH2

1 2

FH4

1 2

FH3

1 2

R22

R16

R19

R20

R21

R15

T2

3

1

2

T3

3

1

2

J9

12

3

J10

12

3

R12R8

TP5

TP4R14

R18

RG1

71

23

56 R

85

R86

R84

C17

C15

C20

L1

1 2

C18

C19

FH1

1 2

R7

R13

C8

C9

TP1

TP2

C21

C16

ST1

SH1

SH2

ST2

ST3

SH3ST4

SH4ST5

SH5ST6

SH6

C_VME_AS_B

6 43

C_VME_IACK_B

C_VME_DTACK_BC_VME_WRITE_BC_VME_LWORD_BC_VME_BERR_BC_VME_SYSRESET_B

C_VME_DATA<15..0>

B22

C_VME_ADDR<23..1>

2

PROJECT:O-DMBEDA-02415-V2-0

MODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

1/11

DATE: 12/12/12PCB by: JMC

Project file:o_dmb.cpm

LAST_MODIFIED=Mon Feb 18 18:12:58 20131/11

E E

A A

B

C C

2

23

3456

67

78

8

D

1

B

D

5 1

1211 GENEVA 23SWITZERLAND

Project:Sheet:

Module:European Organization

for Nuclear Research

4

EN/ICE

NUT

WASHER

SCREW

12

12

12

12

12

12

GND

+

GND

+

++

GND

P2V5

GND

GND

GND

++

P2V5P2V5

F-HOLDER

GNDGNDGNDGNDGND

++

GND

ININ OUT

OUT

EN ADJ

GND GND

GND

GND

GNDGND

GNDGND

**

GND

GND

GND

GNDGND

P2V5

GND

F-HOLDER

F-HOLDER

F-HOLDER

GND

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

GND

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

GND

D13D14D15

D12D11

D08D09D10

D07D06

D03D04D05

D02

D00D01

A23A22A21

A19A20

A18A17A16

A13A14A15

A12A11

A08A09A10

A07A06

A03A04A05

A02A01

RSVBRSVBRSVBRSVBRSVBRSVBRSVBRSVBRSVBRSVBRSVB

RSVU

VPC

IACKOUT

SYSFAILSYSRESET

5VSTDBY+V2-V1-V2

VPC

+V1

RSVB

LI/ILI/ORSVU

SBA

MMDMCTL

SBBRESP

MSD

SERASERB

MCLKMPR

DTACKAS

IACK

WRITE

IACKIN

LWORDBERR

SYSCLK

BG2IN

BG3IN

BG1OUT

BG2OUT

BG3OUT

BG1IN

BG0IN

BCLR

BG0OUT

ACFAIL

BBSY

CONVME64XP1

AM5AM4AM3AM2AM1AM0

IRQ7

IRQ3IRQ4IRQ5IRQ6

IRQ2IRQ1

BR1

BR3

BR0

BR2

DS1DS0

GA2GA1GA0GAP

GA4GA3

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

Page 2: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

CCB_HARDRST_B

CCB_L1ACCCCB_L1ARSTCCB_BXOCCB_BXRSTCCB_CLKENCCB_CMD_S

C_CCB_L1ARSTC_CCB_BXOC_CCB_BXRSTC_CCB_CLKENC_CCB_CMD_S

GTLP16612MEA

SSOP

C_TMB<9>C_TMB<5>C_TMB<1>

C_CCB_RSVI<0>C_CCB_RSVO<1>C_CCB_CAL<1>C_CCB_DRSV<0>

C_CCB_CRSV<1>C_CCB_DATA<5>

C_CCB_BXOC_CCB_CMD<5>

P3V3

P3V3

VREFGTLP

C_CCB_L1ACCC_CCB_EVCNTRES

CLK_N

100

C_CCB_CMD_SC_CCB_CMD<4>C_CCB_CMD<0>C_CCB_CLKENCLK_P

10uF

SIZE=8

10uF

P3V3 P5V

10uF

P5VP3V3

SOICVCC=P2V5

GTLP16612MEA

C_CCB_DATA<1>

C_CCB_CAL<2>

C_CCB_RSVI<2..0>

C_CCB_RSVO<3>C_CCB_RSVI<2>

C_TMB<3>C_TMB<7>C_TMB<11>

C_CCB_DONEC_CCB_L1RLS

C_CCB_CRSV<0>

C_TMB<10>C_TMB<6>C_TMB<2>

1

VREFGTLP

CLK_N

C_CCB_RSVO<4>

C_TMB<8>C_TMB<4>

C_CCB_CMD<1>C_CCB_L1ARST

C_CCB_DATA<0>

C_CCB_DATA<6>C_CCB_DATA<2>

C_CCB_DONE

C_CCB_CMD<2>

C_CCB_CMD<3>C_CCB_BXRSTC_CCB_DATA_SC_CCB_DATA<3>C_CCB_DATA<7>C_CCB_CRSV<3>

C_CCB_RSVI<1>C_CCB_RSVO<2>

C_CCB_DRSV<1>

C_CCB_L1RLS

74ALVC164245DL

SSOP

2

01

DONE

P5V

SSOP

P5V

P3V3

P3V3

0

P5V

P3V3

C_CCB_CRSV<2>

C_TMB<0>

C_CCB_DATA<4>

C_CCB_SOFTRST

2

SSOP

P3V3

C_CCB_CMD<5..0>

C_CCB_DATA<7..0>

SSOP

C_CCB_RSVO<0>

C_CCB_HARDRST_BC_CCB_CAL<0>

VCCB=P3V3;VCCA=P2V5

C_CCB_HARDRST_BC_CCB_SOFTRSTC_CCB_L1ACC

C_CCB_EVCNTRESC_CCB_DATA_S

CCB_EVCNTRES74ALVC164245DL CCB_DATA_S

CCB_DATA<7..0>

CCB_CMD<5..0>

GTLP16612MEA

543210

76543210

76543210

543210

VREFGTLP

CCB_SOFTRST

GTLP16612MEA

SSOP

VCCB=P3V3;VCCA=P2V5

VREFGTLP

P3V3

P5V

74ALVC164245DL

VCCB=P3V3;VCCA=P2V5

SSOP

CCB_RSVO<4..0>

CCB_CAL<2..0>

CCB_CRSV<3..0>

CCB_DRSV<1..0>

CCB_L1RLS

CCB_RSVI<2..0>

43210

43210

3210

3210

210

210

10

01

CMSCLK_NCMSCLK_P

ODMB_CMSCLK_NODMB_CMSCLK_P

VCCB=P3V3;VCCA=P2V5

SSOP

C_CCB_RSVO<4..0>

C_CCB_DRSV<1..0>

C_CCB_CRSV<3..0>

C_CCB_CAL<2..0>

74ALVC164245DL

P3V3

SN65LVDS104D

100NF

SIZE=11

100NF

SIZE=4

100NF

CLK_P

SIZE=7

SIZE=4

SIZE=6

IC38

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

J7

A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16A17A18A19A20A21A22A23A24A25B1B2B3B4B5B6B7B8B9B10B11B12B13B14B15B16B17B18B19B20B21B22B23B24B25C1C2C3C4C5C6C7C8C9C10C11C12C13C14

C15C16C17C18C19C20C21C22C23C24C25D1D2D3D4D5D6D7D8D9

D10D11D12D13D14D15D16D17D18D19D20D21D22D23D24D25E1E2E3E4E5E6E7E8E9

E10E11E12E13E14E15E16E17E18E19E20E21E22E23E24E25

IC39

3568910121314151617192021232426

545251494847454443424140383736343331

56

29

55

30

228

1

2772250 35

IC40

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

IC41

3568910121314151617192021232426

545251494847454443424140383736343331

56

29

55

30

228

1

2772250 35

IC43

3568910121314151617192021232426

545251494847454443424140383736343331

56

29

55

30

228

1

277

2250 35

IC42

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

IC36

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

IC37

3568910121314151617192021232426

545251494847454443424140383736343331

56

29

55

30

228

1

277

2250 35

IC17

678

3

2

1

10

12

14

16

9

11

13

15

R35

PROJECT:O-DMBEDA-02415-V2-0

MODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

2/11

DATE: 12/12/12PCB by: JMC

Project file:o_dmb.cpm

LAST_MODIFIED=Mon Feb 18 17:55:57 20132/11

E E

A A

B

C C

2

23

3456

67

78

8

D

1

B

D

5 1

1211 GENEVA 23SWITZERLAND

Project:Sheet:

Module:European Organization

for Nuclear Research

4

EN/ICE

P2V5

GND

+++

P2V5

GND GND GND

GND

EN1

EN2

EN4

3Y

3Z4Y

4Z

EN3

1Z

AB

2Z

2Y

1Y

GND

GND

GND

GND

GND

GND

P2V5

GND

GNDGND

GND

GNDGNDGND

P2V5

GND

GND

GNDGND

A<16>A<17>A<18>

A<15>

A<7>

A<5>A<6>

B<18>B<17>B<16>

A<14>A<13>A<12>A<11>A<10>A<9>A<8>

A<4>A<3>A<2>A<1>

VREF

CEBA*OEBA*

VCCQ

B<15>B<14>B<13>B<12>B<11>B<10>B<9>B<8>B<7>B<6>B<5>B<4>B<3>B<2>B<1>

VCCVCC

CLKBALEBALEABCLKABCEAB*OEAB*

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

A<16>A<17>A<18>

A<15>

A<7>

A<5>A<6>

B<18>B<17>B<16>

A<14>A<13>A<12>A<11>A<10>A<9>A<8>

A<4>A<3>A<2>A<1>

VREF

CEBA*OEBA*

VCCQ

B<15>B<14>B<13>B<12>B<11>B<10>B<9>B<8>B<7>B<6>B<5>B<4>B<3>B<2>B<1>

VCCVCC

CLKBALEBALEABCLKABCEAB*OEAB*

A<16>A<17>A<18>

A<15>

A<7>

A<5>A<6>

B<18>B<17>B<16>

A<14>A<13>A<12>A<11>A<10>A<9>A<8>

A<4>A<3>A<2>A<1>

VREF

CEBA*OEBA*

VCCQ

B<15>B<14>B<13>B<12>B<11>B<10>B<9>B<8>B<7>B<6>B<5>B<4>B<3>B<2>B<1>

VCCVCC

CLKBALEBALEAB

CLKABCEAB*OEAB*

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

A<16>A<17>A<18>

A<15>

A<7>

A<5>A<6>

B<18>B<17>B<16>

A<14>A<13>A<12>A<11>A<10>A<9>A<8>

A<4>A<3>A<2>A<1>

VREF

CEBA*OEBA*

VCCQ

B<15>B<14>B<13>B<12>B<11>B<10>B<9>B<8>B<7>B<6>B<5>B<4>B<3>B<2>B<1>

VCCVCC

CLKBALEBALEAB

CLKABCEAB*OEAB*

GND GND

C2C1

C7C6C5C4C3

C8

C12C11C10C9

C13

A4A3A2A1

A5

A9A8A7A6

A10

A14A13A12A11

A15

A20A19A18A17A16

A25A24A23A22A21

B3B2B1

B4

B8B7B6B5

B9

B13B12B11B10

B14

B18B17B16B15

B19

B23B22B21B20

B24B25

E25E24E23E22E21E20E19E18E17E16E15

E13E14

E12E11E10

E8E9

E7E6E5

E1E2

E4E3

D25D24D23D22D21D20D19D18D17D16D15D14D13D12D11D10D9D8D7D6D5D4D3D2D1C25C24

C21C22C23

C20C19

C17C18

C16C15C14

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

Page 3: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

C_ALCTDAV

RAWLCT<5..0>

ALCT<16>

4

C_RSVTD<2>

RSVTD<6..3>

RAWLCT<6>

C_RSVTD<6..3>

VCCB=P3V3;VCCA=P2V5SSOP

ALCT<17>

VCCB=P3V3;VCCA=P2V5

0

TMBDAV

C_TMB<17>C_RAWLCT<3>

C_RSVTD<3>

C_ALCT<17>

10uF

SIZE=5

10uF

SIZE=5

C_DONE

C_ALCTDAV

C_TMBDAV

100

C_RSVTD<6>C_RSVTD<2>C_LCTRQST<1>C_LCTRQST<2>

C_RSVTD<5>

C_TMB<13>

ABCDE5X11FC C_ALCT<14>

C_ALCT<10>C_ALCT<6>C_ALCT<2>

C_RSVTD<1>C_ALCT<16>C_TMBFFCLKC_RAWLCT<2>

C_ALCT<13>C_ALCT<9>C_ALCT<5>

P3V3

SIZE=10

100NF

100NF

SIZE=10

P3V3

SSOPVCCB=P3V3;VCCA=P2V5

3

74ALVC164245DL 16

2

C_ALCT<15..0>

C_TMB<17..0>

74ALVC164245DL

10

C_RAWLCT<6>65

C_RAWLCT<6>

ALCTDAVTMBFFCLK

C_RSVTD<1>C_RSVTD<0>C_DONEC_LCTRQST<2>C_LCTRQST<1>

SSOP

5C_TMBDAV

C_TMBFFCLK

7

5

1

12

01234567

891011121314

01234567

8910111213

ALCT<15..0>

15

432

34

14

1110

8

C_RAWLCT<0>

C_ALCT<15>

C_ALCT<12>C_TMB<16>

C_RAWLCT<5>

16

9

C_RAWLCT<1>

C_TMB<15>C_ALCT<11>C_ALCT<7>

C_TMB<12>C_ALCT<1>

C_RSVTD<4>

13

17

1

3

4

32

0

C_TMB<14>C_ALCT<3>

C_ALCT<8>

1415

13

5

4 45

12

5

3

6

15

C_RSVTD<0>

C_RAWLCT<4>

TMB<17..0>

012

11

74ALVC164245DL VCCB=P3V3;VCCA=P2V5

LCTRQST<1>LCTRQST<2>DONERSVTD<0>RSVTD<1>RSVTD<2>

SSOP

74ALVC164245DL

SSOP

74ALVC164245DL1

17

1415

9

76

0

8

100

6

VCCB=P3V3;VCCA=P2V5

C_ALCT<4>C_ALCT<0>

C_ALCT<17>C_ALCT<16>

C_RAWLCT<5..0>

VREFGTLP

100

IC44

4746444341403837

235689

1112

148

3635333230292726

1314161719202223

2425

J8

A1A2A3A4A5A6A7A8A9A10A11

B1B2B3B4B5B6B7B8B9B10B11

C1C2C3C4C5C6C7C8C9C10C11D1

D2D3D4D5D6D7D8D9

D10D11

E1E2E3E4E5E6E7E8E9

E10E11

IC48

4746444341403837

235689

1112

148

3635333230292726

1314161719202223

2425

IC47

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

IC46

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

IC45

4746444341403837

235689

1112

148

3635333230292726

1314161719202223

2425

R135

R136

R134

PROJECT:O-DMBEDA-02415-V2-0

MODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

3/11

DATE: 12/12/12PCB by: JMC

Project file:o_dmb.cpm

LAST_MODIFIED=Mon Feb 18 17:56:01 20133/11

E E

A A

B

C C

2

23

3456

67

78

8

D

1

B

D

5 1

1211 GENEVA 23SWITZERLAND

Project:Sheet:

Module:European Organization

for Nuclear Research

4

EN/ICE

++

GND

P2V5

GND

GND

P2V5

GND

P2V5

GND

GND

GND

GND

GND

GND

GND

GND

GND

P2V5

GND

GND

P15V

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

GND

E2

E4

E6

E9

E11

C1C2C3

C5C6C7C8C9

C11

C4

C10

A9

A6

A4A5

A3A2A1

B11

B9B8

B6B5B4B3

B10

A7A8

A11

B7

B2

A10

B1E10

E7E8

E5

E1

E3

D11D10D9D8D7D6D5D4D3D2D1

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

Page 4: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

JTAG

240

1801.7731

Y

470

1840.6131

PB_HARDRST_B

CCB_HARDRST_BVCC=P2V5

74LVC10AD

240

PROGRAM_B

TMS

PB_HARDRST_B

INIT_B

10k

CCB_EVCNTRES

SM_AVDD

10NF

VCCB=P3V3;VCCA=P2V5

1.00UH

DL_TMS

SN74LVC157ADBR

DL_TCK

TDO

2N7002

59

5

XX

10nF

P3V3

SSOP

VME_DTACK_V6_B

DL_TMS

56

YV6_TMS

13

RSVTD<6..0>

VME_ADDR<23..1>

M1

12

7

TCK

DL_TDI

V6_TCK

0

VME_GAP

20

DL_TCK

SM_AGND

10UF

68NH

C_VME_DTACK_V6_BC_TDO

C_TCKC_TDI

74ALVC164245DL

10

43

13

35

3

12

1415

1716

0

0

12

13

11

1

2223

11

98

67

5

32

214

12

1098

6

45

3

12

1

10

2

21

3

012

4

21

6

1

21

1819

12

1011

8

6

32

4

4

4

5

17

1

4

21

7

0

2

1

7

9

11

17

D<63..0>

63626160

5857565554535251504948

47464544434241403938

36

3433

313029282726252423222120

181716

1514131211109876543210

16

19

37

9

5

14

10

15

15

1

32

7

5

3

8

13

16

3

6

C_TMS

C_TDIC_TDOC_TCKC_TMS

MOLEX_87833

5

0

3

4

5

3

2

0

CCB_RSVI<2..0>

14

C_VME_GAP

15

M2

SM_AGND

10

432

0

330

DONE

1k

4

4VME_GA<4..0>

CCB_CAL<2..0>

2

0

SSOP

VCC=P2V5

TDI

100NF

100NF

2N7002

GND=GNDSOIC

V6_JTAG_SEL

DL_TDIV6_TDI

100NF

100NF

3

0

M0

4.7K

BSP315PSOT223

0

CCB_RSVO<4..0>

CCB_CRSV<3..0>

CCB_DRSV<1..0>

CCB_CMD<5..0>

XC6VLX130T-1FFG1156CES

CCB_SOFTRSTCCB_HARDRST_BTMBDAVALCTDAVTMBFFCLK

TP23TP24

TP26TP25

TP27TP28

RAWLCT<6>

TP29TP30TP31

TP33TP34TP35TP36TP37TP38TP39

INIT_BDONE

PROGRAM_B

SM_AVDD

CCLKTDOTCKTMSTDIVFS

CCB_L1RLSCCB_L1ACCCCB_DATA_SCCB_CMD_SCCB_CLKENCCB_BXOCCB_BXRSTCCB_L1ARST

VME_AM<5..0>

0

TMB<17..0>

ALCT<17..0>

RAWLCT<5..0>

VME_DATA<15..0>

1

XC6VLX130T-1FFG1156CES

VME_GAP

VME_SYSFAIL_OUTVME_BERR_OUT

VME_DTACK_V6_BV6_JTAG_SEL

TDO

V6_TCKV6_TMS

V6_TDI

V6_VME_DIRV6_VME_OE_B

VME_CLKVME_BG3

VME_BG1VME_BG2

VME_DS1_B

VME_WRITE_B

VME_AS_B

VME_LWORD_BVME_BERR_B

VME_SYSRESET_BVME_SYSFAIL_B

VME_BG0

VME_DS0_B

VME_IACK_B

LCTRQST<2>LCTRQST<1>DONE

CCB_DATA<7..0>

TP32

TP40

BGA BGA

R37

R83

R131

T8

3

1

2

R80

R79

IC33

4746444341403837

235689

1112

148

3635333230292726

1314161719202223

2425

PB1

23

1

L51 2

C12

C11

C10

L6

C226

TP26

LD93

14

2

C164

R120

IC34

15

2

5

11

14

3

6

10

13

1

4

7

9

12

J21234567891011121314

T6

3

1

2

IC35

91011

8

R126

T1

2

1

3

R36

C1

TP6

TP11TP10TP9TP8TP7

TP23TP22TP21TP20TP19TP18TP17TP16TP15

TP14TP13TP12

C296

ST16

123

ST17

123

ST18

123

SH18

SH17

SH16

IC32

T18T17

K8

F8

H8

R8

AA8

W17W18

M8

P8

AG33

AB32

AE27AH34

AA31

AE28

AN33

AA30

AM32AP33

AB28

AL31

AM33

AC28

AL30AN34

AB30

AM31

U25

AC29

V33V27

AC30

V32

AD25

AF30

U32V30

AD30

Y28

AF26

AH29

V25AF28

AG30

V29

AP32

AF29

W29U31

AJ29

U33

AB33

AD29

W31AG28

AE29

Y29

T33

AA26

Y32R33

Y26

W32

AA34

AB27

Y34V34

AB26

Y33

AA33

AD27

W25W34

AC27

Y31

AF34

AC32

T30AF33

AB31

AC34

AE34

AD32

AE26AE33

AD31

AG27

AC33

AE32

T31AD34

AE31

AD26

AL34

AG31

T34AL33

AF31

AK32

AK34

AH30

U26AK33

AG32

W26

AH33

AJ31

U28AJ34

AH32

U27

T28

AJ30

W27T25

AJ32

Y27

U30

AB25

V28T29

AA25

W30

AN32

AA29

AK31R34

AA28

AC25

U8

W8V8

L8

G8

AE8

AD8

AC8

AF8

N8

Y8

V17

U18

U17

V18

IC32

H32

N32

AL20

AG26

J31

M30

AL19

AG25

G30

AD21

AE21

AH27

H30

C33

P26

AH20

J26

P25

AF21

AD19

F30

AC19

AG20

N25

K27

N34

AN22

AM21

J27

N33

AP22

AM20

AG21

AP24

AM22

L28

AF20

AN23

AL21

L26

M28

P34

AP25

AL23

L29

AG22

AN24

AM23

H34

AP26

AM25

N29

H33

AN25

AL24

M27

K33

AN27

AM26

R26

J34

AP27

AL25

P29

B32

AF19

AP29

AM27

R28

K34

AN28

AL26

B33

R27

AP30

AL28

A33

L25

AN29

AM28

M26

M25

AP31

AM30

B34

T26

AN30

AL29

K31

P32

AK22

AJ27

J32

N30

AK21

AJ26

R32

AK24

AK28

L31

P30

AK23

AH28

K32

C34

AK26

AL18

M32

P31

AJ25

AK29

M31

C32

E33

AJ20

AK19

D31

D34

AK27

AM18

F33

AP19

AJ22

E31

E34

AN18

AJ21

D32

R31

AP20

AH24

F31

F34

AN19

AH23

E32

K28

AP21

AH25

G32

R29

AN20

AJ24

G31

K29

L33

AE19

P27

L30

G33

AH22

N27

J29

M33

AD20

AC20

J30

L34

N28

K26

Project file:o_dmb.cpm

Design by: G. Magazzu

PROJECT:O-DMBEDA-02415-V2-0

SYSTEM: Cadence SPB16.3

MODULE:o_dmb

PCB by: JMC DATE: 12/12/12

4/11 4/11LAST_MODIFIED=Mon Feb 18 17:55:58 2013

3

4 3 2 15

5 1

A

B

C

D

E

F

G

H

B

C

D

E

F

G

H

2

A

4

TS/DEM

SWITZERLAND1211 GENEVA 23for Nuclear Research

European Organization Project:Sheet:

Module:

BANK 16 BANK 23

BANK 22BANK 15

Sym 2/5

IO_L0P_22IO_L0N_22IO_L1P_22

IO_L2P_22IO_L1N_22

IO_L2N_22IO_L3P_22IO_L3N_22

IO_L4N_VREF_22IO_L4P_22

IO_L5P_22IO_L5N_22IO_L6P_22

IO_L7P_22IO_L6N_22

IO_L7N_22IO_L8P_SRCC_22IO_L8N_SRCC_22

IO_L9N_MRCC_22IO_L9P_MRCC_22

IO_L10P_MRCC_22IO_L10N_MRCC_22IO_L11P_SRCC_22IO_L11N_SRCC_22IO_L12P_VRN_22IO_L12N_VRP_22

IO_L13N_22IO_L13P_22

IO_L14P_22IO_L14N_VREF_22

IO_L15P_22IO_L15N_22IO_L16P_22IO_L16N_22IO_L17P_22IO_L17N_22

IO_L18N_22IO_L18P_22

IO_L19P_22IO_L19N_22

IO_L0P_15

IO_L1P_15IO_L0N_15

IO_L1N_15

IO_L2N_SM8N_15IO_L2P_SM8P_15

IO_L3N_SM9N_15IO_L4P_15

IO_L3P_SM9P_15

IO_L4N_VREF_15IO_L5P_SM10P_15

IO_L6N_SM11N_15

IO_L5N_SM10N_15IO_L6P_SM11P_15

IO_L7N_SM12N_15IO_L7P_SM12P_15

IO_L8P_SRCC_15IO_L8N_SRCC_15IO_L9P_MRCC_15

IO_L10P_MRCC_15IO_L9N_MRCC_15

IO_L10N_MRCC_15IO_L11P_SRCC_15IO_L11N_SRCC_15

IO_L12N_SM13N_15IO_L12P_SM13P_15

IO_L13P_SM14P_15IO_L13N_SM14N_15IO_L14P_15IO_L14N_VREF_15

IO_L15N_SM15N_15IO_L15P_SM15P_15

IO_L16P_VRN_15IO_L16N_VRP_15

IO_L17N_15IO_L17P_15

IO_L18P_15IO_L18N_15IO_L19P_15IO_L19N_15

IO_L0P_23

IO_L1P_23IO_L0N_23

IO_L1N_23IO_L2P_23IO_L2N_23

IO_L3N_23IO_L4P_23

IO_L3P_23

IO_L4N_VREF_23IO_L5P_23IO_L5N_23IO_L6P_23IO_L6N_23IO_L7P_23IO_L7N_23

IO_L8N_SRCC_23IO_L9P_MRCC_23

IO_L8P_SRCC_23

IO_L9N_MRCC_23IO_L10P_MRCC_23IO_L10N_MRCC_23IO_L11P_SRCC_23IO_L11N_SRCC_23

IO_L12N_VRP_23IO_L12P_VRN_23

IO_L13P_23

IO_L14P_23IO_L13N_23

IO_L15N_23

IO_L14N_VREF_23IO_L15P_23

IO_L16P_23IO_L16N_23

IO_L18P_23IO_L17N_23IO_L17P_23

IO_L19P_23IO_L18N_23

IO_L19N_23

IO_L0P_16IO_L0N_16IO_L1P_16IO_L1N_16

IO_L2N_16IO_L2P_16

IO_L3N_16IO_L4P_16

IO_L3P_16

IO_L4N_VREF_16IO_L5P_16

IO_L6N_16

IO_L5N_16IO_L6P_16

IO_L7N_16IO_L7P_16

IO_L9P_MRCC_16IO_L8N_SRCC_16IO_L8P_SRCC_16

IO_L9N_MRCC_16IO_L10P_MRCC_16IO_L10N_MRCC_16IO_L11P_SRCC_16IO_L11N_SRCC_16

IO_L12N_VRP_16IO_L12P_VRN_16

IO_L13P_16

IO_L14P_16IO_L13N_16

IO_L15P_16IO_L14N_VREF_16

IO_L15N_16IO_L16P_16IO_L16N_16

IO_L17N_16IO_L18P_16

IO_L17P_16

IO_L19P_16IO_L18N_16

IO_L19N_16

VCCO_22[5]VCCO_15[5]

VCCO_23[4]VCCO_16[6]

BANK 13

BANK 14

Sym 1/5BANK 0

BANK 12

VREFN_0DXP_0DXN_0

IO_L19N_12

VCCO_12[4]

IO_L19P_12IO_L18N_12IO_L18P_12IO_L17N_12IO_L17P_12IO_L16N_12IO_L16P_12

IO_L15P_12IO_L15N_12

IO_L14N_VREF_12IO_L14P_12IO_L13N_12IO_L13P_12IO_L12N_VRP_12IO_L12P_VRN_12IO_L11N_SRCC_12IO_L11P_SRCC_12IO_L10N_MRCC_12IO_L10P_MRCC_12IO_L9N_MRCC_12

IO_L8N_SRCC_12IO_L9P_MRCC_12

IO_L8P_SRCC_12IO_L7N_12IO_L7P_12IO_L6N_12IO_L6P_12IO_L5N_12IO_L5P_12IO_L4N_VREF_12

IO_L3N_12IO_L4P_12

IO_L3P_12IO_L2N_12IO_L2P_12IO_L1N_12IO_L1P_12IO_L0N_12IO_L0P_12

VCCO_0[2]

VFS_0TDI_0TMS_0TCK_0TDO_0

DOUT_BUSY_0CCLK_0

CSI_B_0RDWR_B_0DIN_0VBATT_0

VN_0

VP_0VREFP_0

AVDD_0AVSS_0M0_0PROGRAM_B_0HSWAPEN_0M2_0M1_0DONE_0INIT_B_0

IO_L19N_14

VCCO_14[4]

IO_L19P_14IO_L18N_14IO_L18P_14IO_L17N_14IO_L17P_14IO_L16N_14IO_L16P_14

IO_L15P_14IO_L15N_14

IO_L14N_VREF_14IO_L14P_14IO_L13N_14IO_L13P_14

IO_L12N_VRP_14IO_L12P_VRN_14

IO_L11P_SRCC_14IO_L11N_SRCC_14

IO_L10N_MRCC_14IO_L10P_MRCC_14IO_L9N_MRCC_14

IO_L8N_SRCC_14IO_L9P_MRCC_14

IO_L8P_SRCC_14IO_L7N_14IO_L7P_14

IO_L6P_14IO_L6N_14

IO_L5N_14IO_L5P_14

IO_L4N_VREF_14

IO_L3N_14IO_L4P_14

IO_L3P_14IO_L2N_14IO_L2P_14IO_L1N_14IO_L1P_14IO_L0N_14IO_L0P_14

VCCO_13[5]

IO_L19N_13IO_L19P_13IO_L18N_13IO_L18P_13IO_L17N_13IO_L17P_13IO_L16N_13IO_L16P_13

IO_L15P_13IO_L15N_13

IO_L14N_VREF_13IO_L14P_13IO_L13N_13

IO_L12N_VRP_13IO_L13P_13

IO_L12P_VRN_13IO_L11N_SRCC_13IO_L11P_SRCC_13IO_L10N_MRCC_13

IO_L9N_MRCC_13IO_L10P_MRCC_13

IO_L8N_SRCC_13IO_L9P_MRCC_13

IO_L8P_SRCC_13IO_L7N_13IO_L7P_13IO_L6N_13IO_L6P_13

IO_L5P_13IO_L5N_13

IO_L4N_VREF_13

IO_L3N_13IO_L4P_13

IO_L3P_13IO_L2N_13IO_L2P_13

IO_L0N_13IO_L1P_13IO_L1N_13

IO_L0P_131

32

13

2

13

2

GND

P2V5

GND

GNDGND

P2V5

P2V5

GND

GND

GND

13

6 578

10 91112

14 13

42

GND

Y

Y

1

2

00

I0I1

1

MUX

ES

I0

I0I1

I1 33

Y

2I1

I03

Y2

1

0

GND

GND

+

P2V5

P2V5

GNDGND

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2> P2V5

P2V5

P2V5

GND

P2V5 P2V5P2V5 P2V5

P2V5

P2V5

P2V5

P2V5

P2V5

GND

GND

GND

P2V5

Page 5: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

NC

NC

NCNC

NCNC

VCC=P2V5SOIC

DS90LV031ATM/NOPB

VCC=P2V5SOIC

DS90LV031ATM/NOPB

PROM_D<15..0>

PROM_A<22..0>

23

1K

15

15

2

22

1

8

6

2

R_LVMB_PON<7..0>

R

1801.2831

G

R

1801.2831

G

R

1801.2831

G

R

1801.2831

G

R

1801.2831

G

R

1801.2831

GL1A_MATCH_2 TCK_1

DS90LV031ATM/NOPB

TCK_4_PDS90LV031ATM/NOPB

TCK_2_P

TCK_2_NTCK_2

SOIC

DS90LV031ATM/NOPB

VCC=P2V5SOIC SOIC

VCC=P2V5

DS90LV031ATM/NOPB

SOICVCC=P2V5

VCC=P2V5SOIC

TCK_6

TCK_5

TCK_4

TCK_6_P

TCK_6_N

TCK_5_P

TCK_5_N

TCK_4_N

L1A_MATCH_4L1A_MATCH_4_P

L1A_MATCH_4_N

L1A_MATCH_3L1A_MATCH_3_P

L1A_MATCH_3_N

L1A_MATCH_2_P

L1A_MATCH_2_N

L1A_MATCH_1L1A_MATCH_1_N

DS90LV031ATM/NOPB

VCC=P2V5SOIC

VCC=P2V5SOIC

212019181716

2N7002

9

LEDS<11..0>

240

240

P3V3

11

10

6

8

7

4

5

3

2

1

0

240

240

240

240

240

240

240

240

240

240

14

11

5

13

4

0

12

1312

910

7654

3

12

0

1

32

456

87

91011

8

11

012

5

7

0

01

3

56

3

4567

4

4

9

4.7k

SOT23

4.7k

74LVC10AD

SOIC GND=GNDVCC=P2V5

REPROG_B

CCB_HARDRST_B

ODMB_HARDRST_B

1K?

VCC=P2V5

TCK_1_P

TCK_1_N

DS90LV031ATM/NOPB

DS90LV031ATM/NOPB

VCC=P2V5

TDI_N

TDI_PTDI

SOIC

DS90LV031ATM/NOPB

VCC=P2V5

TCK_3_N

TCK_3_PTCK_3

DS90LV031ATM/NOPB

VCC=P2V5SOIC

TCK_7_N

TCK_7_PTCK_7

SOIC

100nF

SIZE=10

0

14

3

6

SIZE=39

100NF

7

LVMB_PON<7..0>

LVMB_CSB<6..0>

10

SIZE=23

L1A_MATCH_1_PDS90LV031ATM/NOPB

XC6VLX130T-1FFG1156CES

PB0PB1

BCO

TDO_7

TDO_6P1V0_SM_NP1V0_SM_P

TDO_5P2V5_SM_NP2V5_SM_P

LV_P3V3_SM_PLV_P3V3_SM_N

TDI

TMSTDO_4TDO_3

P5V_SM_NTDO_1TDO_2

P5V_SM_PP5V_LVMB_SM_NP5V_LVMB_SM_PP3V3_PP_SM_NP3V3_PP_SM_P

TCK_7

THERM1_NTHERM2_PTHERM2_N

ORX2-SQ_ENTHERM1_P

ORX2-RX_EN

ORX2-EN_SDORX2-SD

L1A_MATCH_4

L1A_MATCH_5

TP_20

TP_17TP_18TP_19

TP_15TP_16

TP_14

TP_12TP_13

TP_11TP_10

TP_8TP_9

TP_7TP_6

TP_4TP_3TP_2TP_1

1

L1A_MATCH_1

L1A_MATCH_2

L1A_MATCH_3

TP_5

XC6VLX130T-1FFG1156CES

PON_OE_BPON_LOAD

L1A_MATCH_6

L1A_MATCH_7

L1A

INJPLS

EXTPLS

RESYNC

TCK_1

DONE_P_1

DONE_P_3DONE_P_2

DONE_P_4DONE_P_5DONE_P_6

TCK_2

DONE_P_7

TCK_3

TCK_4

TCK_6

TCK_5

PROM_CS_BPROM_OE_BPROM_WE_B

PROM_LE_B

LVMB_SCLKLVMB_SDINLVMB_SDOUT

QPLL_AUTORESTART

QPLL_RESETQPLL_LOCKEDQPLL_ERROR

QPLL_FOSEL<0>

QPLL_FOSEL<3>

QPLL_FOSEL<1>QPLL_FOSEL<2>

QPLL_40MHZ_P

QPLL_80MHZ_PQPLL_40MHZ_N

QPLL_80MHZ_N

ODMB_HARDRST_BREPRGEN_B

BGA BGA

R77

R68

R67

R70

R69

R72

R71

R74

R73

R76

R75

R78

LD33

14

2

LD43

14

2

LD53

14

2

LD63

14

2

LD73

14

2

LD83

14

2

R127

T7

3

1

2

R125

IC35

345

6

R133

IC55

1514

13

412

IC55

910

11

412

IC54

12

3

412

IC55

12

3

412

IC52

910

11

412

IC49

1514

13

412

IC49

12

3

412

IC50

910

11

412

IC50

1514

13

412

IC50

76

5

412

IC52

1514

13

412

IC49

76

5

412

TP27

TP46TP45TP44TP43TP42TP41TP40TP39TP38TP37TP36TP35TP34TP33TP32TP31TP30TP29TP28

IC32

E29

H20

AD16

M22

E28

H19

AL14

L23

V23

A30

G20

AN17

U23

B28

F21

AH17

AE24

A29

D21

AP15

AD24

A28

D22

AP16

E26

W24 D20

AG18E27

V24 C20

AN15

D25

D19

AF15

AF24

D26

C19

AK17

AF25

C25

J22

AH19

AA24

C24

C18

AE16

Y24

C28

E23

AC17

AG23

C27

E22

AJ15

AF23

E19

AJ14

AB23

C29

E21

AM15

AA23

D29

C30

C23

AC18

AE22

D30

F19

AM16

AE23

AC24 C22

AH18H29

AC23 B23

AK14H28

AD22 A23

AK16A31

AC22 A24

AL16B31

F25

H22

AD17

K23

A25

K22

AG15

K24

B30

G22

AE18

L24

F28

G21

AF18

M23

G27

K21

AG17

F23

G28

L21

AM17

F24

F29

A18

AF16

N24

H27

J20

AG16

N23

E24

A19

AD15

G23

G25

B18

AK18

H23

G26

B20

AC15

P24

D27

A20

AJ17

R24

F26

B21

AH15

H24

D24

A21

AL15

H25

T23

B25

F20

AE17

T24

B26

B22

AJ19

J24

A26

L20

AJ16

J25

B27

J21

AP17

IC32

AP14 C13

F18H9

AN14 D14

E18J9

AF13

AB10

AE12

L14

AE13

AC10

M13

L15

L13

AJ9

H14

J15

H13

AH9

M15

AD11

AC9

F11AD12

J16AD10

G11K17

AG11

G16

K13AL8

B13AL13

J17AK8

B12

AF14 C15

B17AE9

AE14 G12

AC14AD9

AG10

D15AL9

B11AG13

AD14AK9

A11

C12

B16AF10

K12AM12

A16AF9

E12

AE11 H15

AF11AP9

AH14 J11

K11AN9

D16

E16AH8

K19AJ11

F16AG8

L16

A15

M17

J10

AP10

H17

M18

B15

AN10

AN13 G13

D17B10

AP12 C14

E17A10

AN12

C17F10

J12AP11

K18F9

H12

AM10

G17D10

E14AG12

G15C10

F14

AH12 L11

L18D9

AH13 K16

L19C9

AK13

J19A8

G10AJ12

AC12A9

H10

AK12

J14E9

F13AM13

M16E8

E13

AM11

AC13C8

A14AL11

K14B8

A13

AL10

K9

D11

H18

AK11

L9

D12

G18

AH10

M10

E11

M11

AJ10

L10

F15

M12

EDA-02415-V2-0

Project file:o_dmb.cpm

PROJECT:O-DMBMODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

5/11

DATE: 12/12/12PCB by: JMC

LAST_MODIFIED=Mon Feb 18 17:55:58 20135/11

3

4 3 2 15

5 1

A

B

C

D

E

F

G

H

B

C

D

E

F

G

H

2

A

4

TS/DEM

SWITZERLAND1211 GENEVA 23for Nuclear Research

European Organization Project:Sheet:

Module:

Sym 4/5BANK 35BANK 33

BANK 36BANK 34

IO_L19N_VRP_34IO_L19P_VRN_34IO_L18N_A16_34

IO_L17N_A18_34IO_L18P_A17_34

IO_L17P_A19_34IO_L16N_A20_34IO_L16P_A21_34

IO_L15P_A23_34IO_L15N_A22_34

IO_L14N_VREF_A24_34IO_L14P_A25_34IO_L13N_A00_D16_34

IO_L12N_A02_D18_34IO_L13P_A01_D17_34

IO_L12P_A03_D19_34IO_L11N_SRCC_34IO_L11P_SRCC_34

IO_L10P_MRCC_34IO_L10N_MRCC_34

IO_L9N_MRCC_34IO_L9P_MRCC_34IO_L8N_SRCC_34IO_L8P_SRCC_34IO_L7N_A04_D20_34IO_L7P_A05_D21_34

IO_L6P_A07_D23_34IO_L6N_A06_D22_34

IO_L5N_A08_D24_34IO_L5P_A09_D25_34IO_L4N_VREF_A10_D26_34

IO_L3N_A12_D28_34IO_L4P_A11_D27_34

IO_L3P_A13_D29_34IO_L2N_A14_D30_34IO_L2P_A15_D31_34

IO_L1P_GC_34IO_L1N_GC_34

IO_L0N_GC_34IO_L0P_GC_34

IO_L0P_33IO_L0N_33IO_L1P_33IO_L1N_33

IO_L2N_33IO_L2P_33

IO_L3P_33

IO_L4P_33IO_L3N_33

IO_L4N_VREF_33IO_L5P_33

IO_L6P_33IO_L5N_33

IO_L6N_33

IO_L7N_33IO_L7P_33

IO_L9P_MRCC_33IO_L8N_SRCC_33IO_L8P_SRCC_33

IO_L10P_MRCC_33IO_L9N_MRCC_33

IO_L10N_MRCC_33IO_L11P_SRCC_33IO_L11N_SRCC_33

IO_L13P_33

IO_L12P_VRN_33IO_L12N_VRP_33

IO_L13N_33IO_L14P_33

IO_L15P_33IO_L14N_VREF_33

IO_L15N_33IO_L16P_33IO_L16N_33

IO_L18P_33

IO_L17P_33IO_L17N_33

IO_L18N_33IO_L19P_33IO_L19N_33

IO_L0N_35IO_L0P_35

IO_L1P_35

IO_L2P_SM0P_35IO_L1N_35

IO_L3N_SM1N_35IO_L3P_SM1P_35IO_L2N_SM0N_35

IO_L4N_VREF_35IO_L4P_35

IO_L5P_SM2P_35IO_L5N_SM2N_35IO_L6P_SM3P_35IO_L6N_SM3N_35IO_L7P_SM4P_35

IO_L8N_SRCC_35IO_L8P_SRCC_35IO_L7N_SM4N_35

IO_L9P_MRCC_35IO_L9N_MRCC_35

IO_L10P_MRCC_35IO_L10N_MRCC_35IO_L11P_SRCC_35

IO_L12N_SM5N_35IO_L12P_SM5P_35IO_L11N_SRCC_35

IO_L13P_SM6P_35IO_L13N_SM6N_35

IO_L14N_VREF_35IO_L14P_35

IO_L15P_SM7P_35IO_L15N_SM7N_35IO_L16P_VRN_35

IO_L17N_35IO_L17P_35

IO_L16N_VRP_35

IO_L18P_GC_35IO_L18N_GC_35

IO_L19N_GC_35IO_L19P_GC_35

IO_L19N_36IO_L19P_36IO_L18N_36

IO_L17P_36IO_L17N_36IO_L18P_36

IO_L16P_36IO_L16N_36

IO_L15N_36

IO_L14N_VREF_36IO_L15P_36

IO_L14P_36IO_L13N_36IO_L13P_36

IO_L12P_VRN_36IO_L12N_VRP_36

IO_L11N_SRCC_36IO_L11P_SRCC_36IO_L10N_MRCC_36

IO_L9N_MRCC_36IO_L10P_MRCC_36

IO_L8P_SRCC_36IO_L8N_SRCC_36IO_L9P_MRCC_36

IO_L7N_36IO_L7P_36IO_L6N_36IO_L6P_36IO_L5N_36

IO_L4N_VREF_36IO_L5P_36

IO_L3P_36IO_L3N_36IO_L4P_36

IO_L2N_36IO_L2P_36IO_L1N_36IO_L1P_36IO_L0N_36IO_L0P_36

VCCO_36[4]VCCO_34[6]

VCCO_35[5\]VCCO_33[5]

BANK 32

BANK 24 BANK 26Sym 3/5

BANK 25

IO_L16N_26IO_L16P_26

IO_L8P_SRCC_24IO_L8N_SRCC_24IO_L9P_MRCC_24IO_L9N_MRCC_24

IO_L8P_SRCC_32IO_L8N_SRCC_32

IO_L19N_GC_25

VCCO_25[4]

IO_L18N_GC_25IO_L19P_GC_25

IO_L17P_25IO_L17N_25IO_L18P_GC_25

IO_L16N_VRP_25IO_L16P_VRN_25IO_L15N_25

IO_L14N_VREF_25IO_L15P_25

IO_L13N_25IO_L14P_25

IO_L12P_25

IO_L13P_25IO_L12N_25

IO_L11N_SRCC_25IO_L11P_SRCC_25IO_L10N_MRCC_25IO_L10P_MRCC_25IO_L9N_MRCC_25

IO_L8P_SRCC_25IO_L8N_SRCC_25IO_L9P_MRCC_25

IO_L7P_25IO_L7N_25

IO_L6P_25IO_L5N_25

IO_L6N_25

IO_L5P_25IO_L4N_VREF_25

IO_L3P_25IO_L3N_25IO_L4P_25

IO_L2P_25IO_L2N_25

IO_L1N_25IO_L1P_25IO_L0N_25IO_L0P_25

VCCO_24[6]

IO_L18N_24IO_L19P_24IO_L19N_24

IO_L18P_24IO_L17N_VRP_24IO_L17P_VRN_24

IO_L16P_RS0_24IO_L16N_CSO_B_24

IO_L15P_FWE_B_24IO_L15N_RS1_24

IO_L13N_D0_FS0_24

IO_L14N_VREF_FOE_B_MOSI_24

IO_L14P_FCS_B_24

IO_L12N_D2_FS2_24IO_L13P_D1_FS1_24

IO_L12P_D3_24IO_L11N_SRCC_24IO_L11P_SRCC_24

IO_L10P_MRCC_24IO_L10N_MRCC_24

IO_L7P_D5_24IO_L7N_D4_24

IO_L6N_D6_24IO_L6P_D7_24

IO_L4N_VREF_D10_24

IO_L5N_D8_24IO_L5P_D9_24

IO_L3N_D12_24IO_L4P_D11_24

IO_L3P_D13_24IO_L2N_D14_24IO_L2P_D15_24IO_L1N_GC_24IO_L1P_GC_24IO_L0N_GC_24IO_L0P_GC_24

IO_L19N_32

VCCO_32[5]

IO_L18N_32IO_L19P_32

IO_L17P_32IO_L17N_32IO_L18P_32

IO_L16P_32IO_L16N_32

IO_L15N_32

IO_L14N_VREF_32IO_L15P_32

IO_L13N_32IO_L14P_32

IO_L12P_VRN_32

IO_L13P_32IO_L12N_VRP_32

IO_L11N_SRCC_32IO_L11P_SRCC_32IO_L10N_MRCC_32

IO_L9N_MRCC_32IO_L10P_MRCC_32

IO_L9P_MRCC_32

IO_L7P_32IO_L7N_32

IO_L6P_32IO_L5N_32

IO_L6N_32

IO_L5P_32IO_L4N_VREF_32

IO_L3P_32

IO_L4P_32IO_L3N_32

IO_L2P_32IO_L2N_32

IO_L1N_32IO_L1P_32IO_L0N_32IO_L0P_32

VCCO_26[5]

IO_L18N_26IO_L19P_26IO_L19N_26

IO_L18P_26IO_L17N_26IO_L17P_26

IO_L15P_26IO_L15N_26

IO_L13N_26IO_L14P_26

IO_L14N_VREF_26

IO_L12N_VRP_26IO_L13P_26

IO_L12P_VRN_26IO_L11N_SRCC_26IO_L11P_SRCC_26

IO_L9N_MRCC_26IO_L10P_MRCC_26IO_L10N_MRCC_26

IO_L8N_SRCC_26IO_L9P_MRCC_26

IO_L8P_SRCC_26

IO_L7P_26IO_L7N_26

IO_L6N_26IO_L6P_26

IO_L4N_VREF_26IO_L5P_26IO_L5N_26

IO_L3N_26IO_L4P_26

IO_L3P_26IO_L2N_26IO_L2P_26IO_L1N_26IO_L1P_26IO_L0N_26IO_L0P_26

GND

GND P2V5

P2V5

GND

GND P2V5

P2V5

P2V5

P2V5

P2V5

P2V5

P2V5

P2V5

P2V5

P2V5

GND

GND

GND

GND

GND

GND P2V5

GND P2V5

GND P2V5

P2V5GND

GND

P2V5

GND

P2V5

GND

P2V5

P2V5

P2V5

P2V5

P2V5

GND

P2V5

Page 6: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

10nF

1k

1K

125MHzVDD=P2V5 10nF

SIZE=8

INCMOS

10NF

P3V3P3V3

100NF

1K

100NF

15PF

80MHZ

SOIC

62

100PF

100NF

10NF

P3V3

100NF

10uF_R

240

LPCC

240

SOICVCC=P3V3

P1V2

1.65V

2MHZ TO 80MHZ

P3V3

I_CLK

QPLL_FOSEL<0>

QPLL_FOSEL<3>

SOIC

QPLL_LOCKED

10K

10K

2N7002

CCLK

P3V3

FXO-LC725-125

0R0

4.7K

QPLL_FOSEL<1>

QPLL_FOSEL<2>

10uF

C?

QPLL_ERROR

100NF

P3V3

4.7K

4.7K

1840.6131

1840.6131

PB1

PB0

VDD=P2V5

P3V3

G1801.2831

R

P3V3

160.32MHZ

100NF

GLO_CLK_N

10NF

10NFGL1_CLK_N

OSC_GL1_CLK_P

OSC_GL1_CLK_N

00

OSC_GLO_CLK_P

OSC_GLO_CLK_N

OSC_GLO_CLK_N

QPLL_EXTCONTROL

10nFVDD=P2V580MHz

FXO-LC725-80

00

100

SIZE=18

100NF

SIZE=12

SIZE=43

100NF

QPLL_FOSEL<2>2N7002

QPLL_RESETQPLL_AUTORESTART

QPLL_FOSEL<0>QPLL_FOSEL<1>

QPLL_FOSEL<3>

100

ODMB_CMSCLK_PODMB_CMSCLK_N

GL1_CLK_P

10NF

GLO_CLK_P10NF

100

10nF

QPLL_80MHZ_N

OSC_GLO_CLK_PDS90LV032ATM/NOPB

QPLL_40MHZ_NQPLL_40MHZ_P

QPLL_80MHZ_P

QPLL_160MHZ_NQPLL_160MHZ_P

100NF

QPLL_EXTCONTROL

INCMOS

QPLL_160MHZ_P

QPLL_160MHZ_N

ORX2-07_N

240

CC1F_T1A

XC6VLX130T-1FFG1156CES

ORX2-07_P

ORX2-06_N

ORX2-05_N

ORX2-06_P

ORX2-05_P

GL1_CLK_P

GL0_RX_P

GL1_CLK_N

GL0_TX_N

GL0_TX_P

GLO_CLK_NGLO_CLK_P

GL0_RX_N

GL1_TX_N

GL1_TX_PGL1_RX_P

GL1_RX_N

ORX2-011_N

ORX2-011_PORX2-012_PORX2-012_N

ORX2-09_N

ORX2-09_P

ORX2-04_N

ORX2-04_P

ORX2-03_N

ORX2-03_PORX2-08_PORX2-08_N

ORX2-02_N

ORX2-02_P

ORX2-01_N

ORX2-01_P

ORX2-010_NORX2-010_P

BGA

IC25

5

23

8

4

2821147

321

9

1615

2019

131227

62426

C293

C7

C140

C142

C138

C139

R48

R47C5

R38

PB223

1

PB323

1

R39

R34

R33

C4 C6

IC26

11

13

12

710

9

8

14

QZ1

1

3

4

2

6

C134

C129

R49

R50

QZ2

1 2

TP24TP25

R178

IC26

3

1

2

74

5

6

14

R46

R179

R81

T5

3

1

2

LD103

14

2

R82

T4

3

1

2

R121

C23

C22

C24

C25 R123

QZ3

1

5

4

QZ4

1

5

4

C141

C297

IC27

412

2

13

ST8

SH8

SH7

ST7

SH11

ST11

SH10

ST10

SH9

ST9

SH12

ST12

SH15

SH13

ST13

ST14

SH14

ST15

12

R122

R124

R192

12

C191

C190

IC32

AP7AK5

AD5

E4

V5

J4

AF2

AM2

E3

V6

J3

AH5

AB5

T5

P5

K6

AH6

AB6

T6

P6

K5

AN7

AH2

AP6

W4

AA4

D6

AM6

AF6

R4

B6

H5

AL4

AD2

N4

G4

L4

AJ4

AC4

U4

F5

M5

AH1

AP5

W3

AA3

D5

AM5

AF5

R3

B5

H6

AL3

AD1

N3

G3

L3

AJ3

AC3

U3

F6

M6

AF1

AP2

Y2

M2

D2

AN4

AD6

V2

K2

C4

AK6

AE4

T2

H2

B2

AK2

AB2

P2

F2

A4

AM1

AP1

Y1

M1

D1

AN3

AG4

V1

K1

C3

AG3

AE3

T1

H1

B1

AK1

AB1

P1

F1

A3

PROJECT:O-DMBEDA-02415-V2-0

MODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

6/11

DATE: 12/12/12PCB by: JMC

Project file:o_dmb.cpm

LAST_MODIFIED=Mon Feb 18 17:55:59 20136/11

E E

A A

B

C C

2

23

3456

67

78

8

D

1

B

D

5 1

1211 GENEVA 23SWITZERLAND

Project:Sheet:

Module:European Organization

for Nuclear Research

4

EN/ICE

GND

P2V5

GND

QPLL

EXTCONTROL

ERROR

MODE

INCMOS

LVDS160MHZLVDS160MHZ

LVDS80MHZLVDS80MHZ

LVDS40MHZLVDS40MHZ

LOCKED

XTAL1XTAL2

INLVDSINLVDS

CAP

RESETAUTO_RESTART

FREQRANGE<3>FREQRANGE<2>FREQRANGE<1>FREQRANGE<0>

Sym 5/5BANK 115BANK 112

BANK 113

BANK 116

BANK 114NA

MGTAVTT_S[9..0]

MGTAVCC_S[9..0]

MGTAVCC_N[5..0]

MGTAVTT_N[5..0]

MGTTXP0_114MGTRXP0_114

MGTRXN0_114

MGTRXP1_114MGTTXN0_114

MGTTXP1_114

MGTTXN1_114MGTRXN1_114

MGTREFCLK0N_114MGTREFCLK0P_114MGTRXP2_114MGTREFCLK1N_114MGTREFCLK1P_114

MGTTXN2_114

MGTTXP2_114MGTRXN2_114

MGTTXP3_114MGTRXP3_114

MGTTXN3_114MGTRXN3_114

VCCINT[54..0]

GND[252..0]

VCCAUX[12..0]

MGTRXP0_116

MGTTXN0_116

MGTTXP0_116MGTRXN0_116

MGTTXP1_116MGTRXP1_116

MGTRXN1_116MGTTXN1_116

MGTREFCLK0N_116MGTREFCLK0P_116

MGTRXP2_116MGTREFCLK1N_116

MGTTXP2_116MGTREFCLK1P_116

MGTRXN2_116

MGTRXP3_116MGTTXN2_116

MGTTXP3_116

MGTTXN3_116MGTRXN3_116

MGTRXN0_113

MGTRXP0_113MGTTXP0_113

MGTRXP1_113MGTTXN0_113

MGTTXP1_113MGTRXN1_113MGTTXN1_113

MGTREFCLK0P_113MGTRXP2_113

MGTREFCLK0N_113

MGTREFCLK1P_113MGTREFCLK1N_113

MGTTXN2_113MGTRXN2_113MGTTXP2_113

MGTRXP3_113MGTTXP3_113

MGTTXN3_113MGTRXN3_113

MGTRXP0_112MGTTXP0_112MGTRXN0_112

MGTRXP1_112MGTTXN0_112

MGTTXP1_112

MGTTXN1_112MGTRXN1_112

MGTREFCLK0N_112MGTREFCLK0P_112MGTRXP2_112

MGTREFCLK1P_112MGTREFCLK1N_112

MGTTXP2_112MGTRXN2_112MGTTXN2_112MGTRXP3_112MGTTXP3_112

MGTTXN3_112MGTRXN3_112

MGTRXP0_115MGTTXP0_115

MGTRXP1_115MGTTXN0_115MGTRXN0_115

MGTTXP1_115MGTRXN1_115MGTTXN1_115

MGTREFCLK0N_115MGTREFCLK0P_115

MGTRREF_115MGTAVTTRCAL_115

MGTRXP2_115

MGTREFCLK1P_115MGTREFCLK1N_115

MGTRXN2_115MGTTXP2_115

MGTTXN2_115MGTRXP3_115MGTTXP3_115MGTRXN3_115MGTTXN3_115

GND

12

12

12

13

2

13

2

13

2

13

2

13

2

13

2

+

-

GND

P2V5

GND

P2V5

+

+

GND

OUT-

OUT+ E/D

OUT-

OUT+ E/D

GND

P2V5

P2V5

GND

P2V5 P2V5

GND

GND

P2V5

PRE

CLRLVC74ASN74

Q

GND

Q

D

CLK

VCC

GND

P2V5

GND

GND

GND

VCC

GND

CVTS

OUT

GND

PRE

CLRLVC74ASN74

Q

GND

Q

D

CLK

VCC

GND GNDGND

GND

GND

P2V5

GNDP1V0

P2V5

GND

P2V5

GNDGNDGND GND GND GND GND

Page 7: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

CMSCLK_PCMSCLK_N

L1A_PL1A_N

INJPLS_PINJPLS_NREPRGEN_B

DONE_6DONE_7

L1A_MATCH_4_PL1A_MATCH_4_NL1A_MATCH_6_PL1A_MATCH_6_N

SEL_SKW_B

00

DONE_1

TYCO_787083-5

DONE_3DONE_2TCK_6_NTCK_6_PTCK_4_NTCK_4_PTCK_2_NTCK_2_PTDO_7_NTDO_7_PTDO_5_NTDO_5_PTDO_3_NTDO_3_PTDO_1_NTDO_1_P

BCO_NBCO_P

P3V3_PP

TYCO_787083-5

TDO_6_P

REPROG_B_NREPROG_B_P

RESYNC_N

L1A_MATCH_1_N

L1A_MATCH_3_N

DS90LV032ATM/NOPB

TDO_1

P3V3_PP

L1A_MATCH_1_P

L1A_MATCH_3_P

L1A_MATCH_5_PL1A_MATCH_7_N

P3.3VORX

TDO_2_N

SOIC

P3V3_PP

RESYNC_PEXTPLS_N

ORX2-011_N

TCK_1_N

74ALVC164245DL

SIZE=6

TDO_3_P

GL0_RX_P

GL0_RX_N

TCK_5_NTCK_5_P

ORX2-09_NORX2-010_PORX2-010_N

ORX2-011_P

ORX2-012_P

DS90LV032ATM/NOPB

100NF

SIZE=2

100nF

SIZE=10

TDO_7TDO_7_P

DS90LV032ATM/NOPB

TDO_5_N

VCC=P2V5SOIC

DONE_7 DONE_P_7

DS90LV032ATM/NOPB

G

G1801.8831

100NF

1.0NFGL1_RX_P

GL1_RX_N

VCCR

DONE_P_3DONE_P_4DONE_P_5DONE_P_6

DONE_P_1DONE_P_2

TCK_3_NTCK_3_P

VCCB=P3V3

DS90LV032ATM/NOPBTDO_7_N

100

TDO_6_P

TDO_6_N

100

100

TDO_5_P

100

TDO_4_N

TDO_4_P

100

100

TDO_3_N

TDO_2

VCC=P2V5

TDO_2_P

100

TDO_1_N

TDO_1_P

100MOUNTED=NO

DS90LV032ATM/NOPB

VCC=P2V5

REPROG_BREPROG_B_P

REPROG_B_N

EXTPLSEXTPLS_P

EXTPLS_N

SOICVCC=P2V5

DS90LV031ATM/NOPB

SOICVCC=P2V5

DS90LV031ATM/NOPB

TCK_7_NTCK_7_P

DONE_1DONE_2DONE_3DONE_4DONE_5DONE_6

VCCA=P2V5

SOIC

SSOP

1.0NF

DS90LV032ATM/NOPBMALE/FEMALE

1.0NF

1.0NF

VCC=P2V5

TDO_4

VCC=P2V5

100NF

ORX2-EN_SDORX2-SQ_EN

10uF

ORX2-03_N

TDO_5

ORX2-07_PORX2-07_N

ORX2-08_NORX2-09_P

ORX2-01_NORX2-02_PORX2-02_N

ORX2-03_P

GL1_TX_P

GL1_TX_N

GL0_TX_P

GL0_TX_N

1.0NF

100MOUNTED=NO1.0NF

1.0NF

100NF

MALE/FEMALE

1.0NF

FTLF8519F2GCL

470

470

VCCT

ORX2-05_P

ORX2-06_PORX2-05_N

ORX2-04_P

100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF100NF

ORX2-04_N

ORX2-01_P

100NFSN-R12-C00501-000-0-12

100NF

FTLF8519F2GCL

VCCR

ORX2-RX_EN

VCCT

100NF

TMS_PTMS_N

TCK_1_P

TDO_6_N

TDO_4_N

TDO_2_NTDO_2_P

DONE_5

EXTPLS_P

SN-R12

SOIC

ORX2-08_P

L1A_MATCH_5_N

L1A_MATCH_7_P

ORX2-012_N

ORX2-SD

VCC=P2V5

TDO_3

SOICVCC=P2V5

SOIC

TDO_6

SOIC

TDI_NTDI_P

TDO_4_P

L1A_MATCH_2_PL1A_MATCH_2_N

DONE_4ORX2-06_N

OT1

11 12

45

38

109

2617

RX1

G8G7

B5B6C6C7D7D8

F7F6E6E5G5G4F4F3E3E2D5D4C4C3B3B2

H9I9

H7J10

R64

R63

OT2

11 12

45

38

109

2617

C405

C410

C416

C411

C406

C407R197

C412

C413R198

C408

C409

C414

C415

C46C47

C42C43

C40C41

C49

C44C45

C48

C26C27

C32C33

C31C30

C35

C28C29

C34

C37C36

C38C39

J4

123456789

10111213141516171819202122232425

26272829303132333435363738394041424344454647484950

J3

123456789

10111213141516171819202122232425

26272829303132333435363738394041424344454647484950

R132

IC51

412

14

1513

IC53

412

10

911

IC51

412

6

75

IC51

412

2

13

IC53

412

14

1513

IC51

412

10

911

IC53

412

2

13

IC58

4746444341403837

235689

1112

148

3635333230292726

1314161719202223

2425

IC57

76

5

412

IC57

12

3

412

R194

R196

R129

R195

R128

R193

R130

LD13

14

2

PROJECT:O-DMBEDA-02415-V2-0

MODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

7/11

DATE: 12/12/12PCB by: JMC

Project file:o_dmb.cpm

LAST_MODIFIED=Mon Feb 18 17:56:00 20137/11

J9

E E

A A

B

C C

2

23

3456

67

78

8

D

1

B

D

5 1

1211 GENEVA 23SWITZERLAND

Project:Sheet:

Module:European Organization

for Nuclear Research

4

EN/ICE

GND

GND GND

GND

TD+

TDIS

VCCT

RD+RD-

CAGE

VEET

SD

VCCRVEER

CAGE

TD-

GND

GND

P2V5

GND

GND

Receiver

EN_SDSQ_EN

RX_EN

SD

VPP[4]VCC[7..0]GND[33..0]

DOUT1-DOUT1+

DOUT2+DOUT2-DOUT3+DOUT3-DOUT4+

DOUT5-

DOUT4-DOUT5+

DOUT6-DOUT6+

DOUT7+DOUT7-DOUT8+DOUT8-DOUT9+DOUT9-

DOUT10+DOUT10-DOUT11+DOUT11-DOUT12+DOUT12-

GND

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

P2V5

GND

+

+

-

GND

P2V5

+

-

GND

P2V5

GND

P2V5

+

-

GND

P2V5

+

-

GND

P2V5

GND

P2V5

+

-

+

-

GND

P2V5

GND

P2V5

P2V5

GND

+

-

GNDGND GND

45 30

31

21

3

78

6

131211109

14151617

23

2120

2425

49

44

4647

3940414243

3435

3738

36

3332

29282726

4822

1819

45

50

GND

45 30

31

21

3

78

6

131211109

14151617

23

2120

2425

49

44

4647

3940414243

3435

3738

36

3332

29282726

4822

1819

45

50

TD+

TDIS

VCCT

RD+RD-

CAGE

VEET

SD

VCCRVEER

CAGE

TD-

Page 8: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

ERTJ1VR333J2X

P1=GND;P2=GND

L1A_MATCH_7_N

L1A_MATCH_7_PL1A_MATCH_7

L1A_MATCH_6_P

L1A_MATCH_6_NL1A_MATCH_6

L1A_PL1A

L1A_MATCH_5

BCO

INJPLS_N

INJPLS_P

RESYNC_N

INJPLS

RESYNC

BCO_N

BCO_P

TMSTMS_N

TMS_P

DS90LV031ATM/NOPB

VCC=P2V5SOIC

DS90LV031ATM/NOPB

VCC=P2V5SOIC

SOIC

VCC=P2V5SOIC

DS90LV031ATM/NOPB

VCC=P2V5SOIC

SOIC

DS90LV031ATM/NOPB

VCC=P2V5SOIC

SOICVCC=P2V5

AD8594ARZ

4413

40

57

41

536

3233

35

39

1234

6

8

15

50

4243

454647

49

5152

5556

5859

6162

91011

17181920212223242526272829

31

QTE40_01LDA

5453

P3V3_TC

0

16

14

12

7

34

30

GND_TC

3738

48

63

60

DS90LV031ATM/NOPBRESYNC_P

L1A_N

DS90LV031ATM/NOPB

100NF

10uF

10uF

DS90LV031ATM/NOPB

THERM2

SIZE=2

DS90LV031ATM/NOPB

VCC=P2V5

L1A_MATCH_5_N

L1A_MATCH_5_P

51k

5.1k

5.1k

151413

1112

910

8

67

45

3210

FTG64C

202122

171819

1615

121314

1011

789

65

34

2104

.7K

4.7K

100

MONTED=NO

100

MONTED=NO

1k

4.7K

CCLK

PROM_D<15..0>

PROM_LE_B

PROGRAM_B

INIT_B

PROM_A<22..0>

1k

SOIC

SIZE=2

100NF

SIZE=2

THERM1

4.3k

4.3k

THERM1_P

THERM2_N

00

51k

P3V3

33k

33k

VCC=P2V5

THERM2_P

100NF

D<63..0>

THERM1_N

10nF

10nF

XCF128XFTG64C

PROM_OE_BPROM_CS_BPROM_WE_B

1kTHERM1

1k

1kTHERM2

1k

IC16

2

6

11

15

1

7

10

16

3

5

12

14

9

13 4

J51 23 45 67 89 10

11 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 40

41 4243 4445 4647 4849 5051 5253 5455 5657 5859 6061 6263 6465 6667 6869 7071 7273 7475 7677 7879 80

IC31

A1B1C1D1D2A2C2A3B3C3D3C4A5B5C5D7D8A7B7C7C8A8G1

F2E2G3E4E5G5G6H7E1E3F3F4F5H5G7E7

B4F8

F1H1

B8

D4

G4

A4

H4

G8

G2

R6

R117

R26

TH1

TH2

R118

R115

R119

R116

C131

R113

R114

C290

R27

R32

R31

IC52

12

3

412

ST19

12

ST20

12

IC54

910

11

412

IC54

76

5

412

IC54

1514

13

412

IC56

76

5

412

IC56

12

3

412

IC56

1514

13

412

IC52

76

5

412

SH19

SH20

C3

R30

R23

C2

R29

R28

R25

R24

PROJECT:O-DMBEDA-02415-V2-0

MODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

8/11

DATE: 12/12/12PCB by: JMC

Project file:o_dmb.cpm

LAST_MODIFIED=Mon Feb 18 17:56:00 20138/11

E E

A A

B

C C

2

23

3456

67

78

8

D

1

B

D

5 1

1211 GENEVA 23SWITZERLAND

Project:Sheet:

Module:European Organization

for Nuclear Research

4

EN/ICE

GND

P2V5

P1V8

A<22>

E*G*

VDD<1-0>VDDQ

VPP

READY_WAIT

K

WP*RP*

L*

W*

A<21>A<20>A<19>A<18>A<17>A<16>A<15>A<14>A<13>A<12>A<11>A<10>A<9>A<8>A<7>A<6>A<5>A<4>A<3>A<2>A<1>A<0>

DQ<15>DQ<14>DQ<13>DQ<12>DQ<11>DQ<10>DQ<9>DQ<8>DQ<7>DQ<6>DQ<5>DQ<4>DQ<3>DQ<2>DQ<1>DQ<0>

VSSQVSS<1-0>

797775

7173

67656361

69

59

53

5755

514947454341

3937353331

272523

29

2119

13

1715

1197531

72

80787674

70

6462

6668

5254565860

50

403836343230

242628

22

14161820

12

46810

2

48464442

B

C

A

DOUT

OUT

OUT

OUT

IN-

IN-

IN+

IN+

IN-

IN-

IN+

IN+

SD*V+AV-A GND

GND

P2V5P2V5

GND

P2V5

GND

P2V5

GND

P2V5

GND

P2V5

GND

P2V5

GND

P2V5

GND

P2V5

P2V5

12

12

GND

GND

P2V5

GND

P2V5

++

GND GND

P1V8 P2V5

GNDGND

P2V5

GND

GND

GND

P2V5

P2V5P1V8

GNDGND

GND

GND

P2V5

Page 9: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

100NF

100NF

SIZE=3

1K

1K

10UF

10UF

3.9K

1K

10UF

1K

1.5K

MIC69502WR

LV_P3V3

100K

100K

S-PAK-7

MIC69502WR

100K

4.7uF

LV_P3V3

2.7K

4.7uF

MIC69502WR

S-PAK-7

S-PAK-7

MIC69502WR

S-PAK-7

P1V2

LV_P3V3

330

330

330

330

1k

1k

510

3k

3k

VCCR

P3.3VORX

3k

1k

1k

1k

820

1.6k

1k

1k

1k

330

330

UMAX

3k

5.1k

1k

1k

VCCT1.20UH

1.20UH

4.7UF

4.7UF

1K

4.3k

4.3k

4.3k

P5V

20k

100K

4.7uF

P1V0_SM_N

P2V5_SM_P

P2V5_SM_N

P3V3_PP_SM_P

P3V3_PP_SM_N

LV_P3V3

2.4k

SIZE=8

VCC=LV_P3V3

MAX6709OUB+

4.3k

10UF

3k

P3V3_PP

P3V3_PP

330

330

MAX6709OUB+

P3V3

VCCT

VCC=LV_P3V3UMAX

P5V_LVMB

P1V2

LV_P3V3

10NF

P5V_LVMB

28k

28k

4.99k

45.3k

4.99k

4.99k

4.3k

100NF

4.7UF

100NF

45.3k

P5V_SM_N

VCCR

4.99k

P5V_SM_P

P5V_LVMB_SM_P

10NF

100NF

100NF

100NF

4.99k

LV_P3V3_SM_P

LV_P3V3_SM_N

LV_P3V3

10nF

1k1/16W

1k1/16W

1k1/16W

1k

1k

1k1/16W

1k

4.99k

4.99k

4.3k1/16W

1/16W1k

1k1/16W

1k1/16W

1k1/16W

4.7uF

10NF

P5V_LVMB_SM_N

10nF

10nF

10nF

10nF

10nF

1k1/16W

1/16W

P1V0_SM_P

P3.3VORX

100NF

4.7UF

1/16WVCC=LV_P3V3UMAX

MAX6709OUB+

330

330 1.20UH

4.7UF

4.7UF

REG_P3V3

GGG

GGG

GGG

VME_P3V3

VME_P5V

510

GGG

564-0100-222

564-0100-222

564-0100-222

564-0100-222

330

C62

C61

C60

C58

C64

C52

C51

C50

C53

C54

C57

C56

C55

C63

C59

TP48

C68

C14

TP3

C70

TP49

RG4

71

23

56

R140

R88

R144

R141

R142

R87

RG2

71

23

56

R89

R143

RG5

71

23

56

R145

L31 2

L41 2

L21 2

TP47

C66

R138

R139

RG3

71

23

56

R137

R149

R150

R151

R148

R153

R154

R155

C67

C13

C69

C65

R146

R147

IC60

1234

9876

R167

R166

R173

R172

R171

R170

R169

R168

R152

R156

R157

IC61

1234

9876

R175

R177

R174

R176

R159

IC59

1234

9876

R158

R161

R163

R165

R160

R162

R164

C185

R54

R41

R53

R40

R51

R52

C186

R45

R61

R62

C179

R43

R58

C182

R44

R60

C180

R42

R56

C184

R55

R59

R57

R1891 2

R1881 2

R1871 2

R1861 2

R1821 2

R1831 2

R1841 2

R1851 2

R1811 2

R1801 2

R1911 2

R1901 2

LD12

531

642

LD13

531

642

LD11

531

642

LD14

531

642

PROJECT:O-DMBEDA-02415-V2-0

MODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

9/11

DATE: 12/12/12PCB by: JMC

Project file:o_dmb.cpm

LAST_MODIFIED=Mon Feb 18 17:56:00 20139/11

E E

A A

B

C C

2

23

3456

67

78

8

D

1

B

D

5 1

1211 GENEVA 23SWITZERLAND

Project:Sheet:

Module:European Organization

for Nuclear Research

4

EN/ICE

GND GND

P2V5

P1V8

P1V0 GND

GND

GND

GND

P2V5

P1V0

GND

GND

GND

GND

GND

GND

GND

P2V5

P1V8 P1V0

GND GNDGND GND

IN1

PWRGD4PWRGD3PWRGD2PWRGD1

IN4IN3IN2

GNDGND

IN1

PWRGD4PWRGD3PWRGD2PWRGD1

IN4IN3IN2

GND GND GNDGND

GND

IN1

PWRGD4PWRGD3PWRGD2PWRGD1

IN4IN3IN2

+

GND

+

GND

+

GND

GND

+

GND

P2V5

ININ OUT

OUT

EN ADJ

GND GND

+

GND

ININ OUT

OUT

EN ADJ

GND

ININ OUT

OUT

EN ADJ

GND

ININ OUT

OUT

EN ADJ

+

GND

+

GND

GND

+

GND GND GND GND GND

+ +

GND

+

GND GND

+

GND GND

GND

+

GND GND

+

Page 10: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

C_LVMB_PON<7..0>

8

SOIC

C_LVMB_SDIN_P C_PON_LOAD

1k

1k

C_LVMB_PON<7..0>

C_LVMB_SCLK_N

C_LVMB_SDOUT_P

6

VCCA=P2V5;VCCB=P3V3SSOP

74ALVC164245DL

C_LVMB_CSB<6..0>

C_LVMB_SDOUT_PC_LVMB_SDIN_NC_LVMB_SDOUT_N

C_LVMB_CSB<6..0>

P5V_LVMB

76543

12

065

34

2

01

VCC=P3V3

P3V3

100

P3V3

C_LVMB_SCLK_PC_LVMB_SDIN_N

P3V3

VCC=P3V3

DS90LV031ATM/NOPB

SOIC

0

65

7654

0

7

4

6

23

10

12345

7

1

2

0000

5

543

0

654321

0

SSOP

C_PON_OE_B

012

VCCA=P2V5;VCCB=P3V3

QSOP

C_PON_LOAD

2

C_PON_OE_B

74ALVC164245DL

LVMB_SCLKLVMB_SDINPON_LOAD

VCC=P3V3

3

1

74ALVC164245DL

LVMB_PON<7..0>

6

LVMB_CSB<6..0>

4

7

PON_OE_B

C_LVMB_SCLK_N

SSOP

TDO

VCCA=P2V5;VCCB=P5V

151413

9

76543210

DS90LV032ATM/NOPB

C_LVMB_SDOUT_N

C_LVMB_SCLK_P

LVMB_SDOUT

C_LVMB_SDIN_P

12

74ALVC164245DL

C_VME_DATA<15..0>

JVME_OE_B

3

1011

TYCO_787083-5

R_LVMB_PON<7..0>

SSOPVCCA=P2V5;VCCB=P3V3

CY74FCT821ATQC

P3V3

10uF

C?

SIZE=6

P3V3

SIZE=12

100NF

10uF

100NF

SIZE=2

SIZE=2

100NF

10uF

P5V P5V

IC3

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

J11 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50

IC5

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

R2R3

IC4

13

234567891011

1

23222120191817161514

IC6

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

R1

R5

R4

IC1

4

12

14

2

6

10

15

1

7

9

13

3

5

11

IC2

1

7

9

15

2

6

10

14

3

5

11

13

4

12

IC8

4746444341403837

2356891112

148

3635333230292726

1314161719202223

2425

C73

C71

PROJECT:O-DMBEDA-02415-V2-0

MODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

10/11

DATE: 12/12/12PCB by: JMC

Project file:o_dmb.cpm

LAST_MODIFIED=Mon Feb 18 17:55:56 201310/11

E E

A A

B

C C

2

23

3456

67

78

8

D

1

B

D

5 1

1211 GENEVA 23SWITZERLAND

Project:Sheet:

Module:European Organization

for Nuclear Research

4

EN/ICE

GND

GND GND

+

P2V5P2V5

GND

+

GND

GND

P2V5

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

GND

EN

+

EN

-

+

-

-

+

+-

GND

+

GND

GND

GNDGND

GND

GND

P2V5

P2V5

GND

GND

GND

GND

GND

GND

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

GNDY

CP

0

D1D

32DDDD

D

OE*

YY

YY1

0

32

4YY

YY

65

89

Y7

456D7D89D

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

GND

13

2

79

49

373941

33312927

35

1719212325

11

1513

5

50

464847

4543 44

4240383634323028262422201816141210864

1DIR

1B<3>

1B<4>

1B<5>

1B<6>

1B<7>

2OE

2B<0>

2B<1>

1OE

1B<0>

1B<1>

1B<2>

2B<2>

2A<1>

2A<0>

2DIR

1A<7>

1A<6>

1A<5>

1A<4>

1A<3>

1A<2>

1A<1>

1A<0>

2B<3>

2B<4>

2B<7>

2B<6>

2B<5>

2A<7>

2A<6>

2A<5>

2A<4>

2A<3>

2A<2>

Page 11: macOS Serverpadley.rice.edu/cms/ODMB/ODMB_schematic_final.pdf · 19 C_VME_GA P3V3 P5V FUSE_5A P5V_LVMB for M2.5 screw BN629-1348426 2x 2x BORNIER3 BORNIER3 VME_P3V3 VME_P5V

VME_WRITE_B

P3V3

VME_WRITE_B

C_VME_DTACK_B

ENJTAG_B

ENJTAG_B

GND=GND

C_VME_DTACK_BC_VME_DTACK_V6_B

C_VME_DTACK_DL_B

VCC=P3V3SOIC

74FCT244ATSOG

SOICVCC=P3V3

74FCT244ATSOG

JVME_RD_OE_B

XXIN1

SOIC

74LVC10AD

GND=GNDVCC=P3V3

SOIC

74LVC10AD

GND=GNDVCC=P3V3SOIC GND=GND

VCC=P3V3

SIZE=11

P3V3

100NF

P3V3

GND=GNDVCC=P3V3

GAYES3GAYES2GAYES1

XIN2

ENDTACK_B

TCK_B

C_TCK

C_TMS

C_TDI

SOIC

74LVC240AD

VCC=P3V3

3.3K

3.3K

3.3K

SOIC

74LVC27D

VCC=P3V3GND=GNDVCC=P3V3

VCC=P3V3

P3V3

1k

1801.7731

Y

AOUT<8>AOUT<1>

DELAY_VME_DS0_BVME_DS1_B

XOUT3

AMYESH

VME_ADDR<23>

VME_AS_B

XIN2XIN1

VME_AM<5>VME_AM<4>

VME_DATA<1>

VME_DS0_BVCC=P3V3

P3V3

SOIC GND=GNDVCC=P3V3

VME_GA<0>

GAYES3

GND=GND

SOIC

VME_GA<3>

VME_ADDR<22>

3.3K

74LVC240AD

74LVC27D

VME_AM<3>

GAYES0

GND=GND

74LVC10AD

AOUT<3>

XXIN2

XOUT2

GAYES0VME_ADDR<19>

C_VME_DTACK_DL_B

P3V3

SOIC

VME_ADDR<11>

VME_IACK_BVME_LWORD_B

AOUT<2>

VCC=P3V3

SOIC

VME_ADDR<4>

VME_ADDR<5>

SOIC

SOIC

GAYES4

SOIC

AOUT<4>

GND=GND

VME_ADDR<16>VME_ADDR<17>VME_ADDR<18>

AOUT<2>

GND=GND

AOUT<4>

74LVC27D

VME_ADDR<20>

SN74LVC04AD

VME_ADDR<15>

AOUT<5>

VME_ADDR<21>

VME_GA<2>

VME_GA<1>GAYES1

VME_ADDR<9>VME_ADDR<8>

VME_ADDR<10>

74LVC10AD

VME_ADDR<12>VME_ADDR<13>

VME_ADDR<14>

SOIC

AOUT<8>AOUT<7>

AOUT<9>

74LVC10AD

AMYESLXIN1

AMYESH

GAYES2

AOUT<7>

AOUT<9>

74LVC10AD

XIN3

AOUT<5>

AOUT<1>

XXIN1

XOUT3

XOUT1

VCC=P3V3

VCC=P3V3

VCC=P3V3

GND=GNDVCC=P3V3

GND=GND

V6_VME_DIR

74LVC10AD

SOIC

VME_WRITE_BXIN3

JVME_WR_OE_B

74LVC86AD

GAYES4

VME_DIR

SN74LVC157ADBR

VME_ADDR<7>VME_ADDR<6>

AOUT<3>

74LVC86AD

VME_AM<1>

VME_AM<0>

VME_GA<4>

V6_VME_OE_B

AMYESL

VME_OE_B

VCC=P2V5SSOP

JVME_OE_B

SOIC

74LVC27D

DELAY_VME_DS0_B

XXIN2

GND=GNDVCC=P3V3

XXIN1Y

1k

ENJTAG_B

XXOUT1

ENJTAG_B

ENDTACK_B

JVME_WR_OE_B

JVME_RD_OE_B

10uF

SIZE=10

VME_DATA<0>

SOIC

XOUT1

ENDTACK_B

XXOUT1XOUT2

VME_ADDR<3>VME_ADDR<2>

R17

IC14

9 8

5 6

13 12

11 10

3 4

1 2

R9

IC9

17

15

13

11

19

3

5

7

9

IC9

2

4

6

8

1

18

16

14

12

IC12

1

23

4

56

9

108

12

1311

IC15

2

13

4

56

9

108

12

1311

IC18

12

1312

345

6

91011

8

IC29

12

1312

543

6

91011

8

IC11

12

1312

IC22

21

1312

11109

8

345

6

345

6

91011

8

IC24

543

6

IC19

12

1312

21

1312

91011

8

345

6

10119

8

IC10

2

4

6

8

1

18

16

14

12

IC10

11

13

15

17

19

9

7

5

3

R66

R65

R11

R10

LD23

14

2

IC21

12

1312

IC21

345

6

IC23

12

1312

IC23

345

6

IC23

91011

8

IC28

15

2

5

11

14

3

6

10

13

1

4

7

9

12

PROJECT:O-DMBEDA-02415-V2-0

MODULE:o_dmb

Design by: G. Magazzu

SYSTEM: Cadence SPB16.3

11/11

DATE: 12/12/12PCB by: JMC

Project file:o_dmb.cpm

LAST_MODIFIED=Mon Feb 18 17:55:56 201311/11

E E

A A

B

C C

2

23

3456

67

78

8

D

1

B

D

5 1

1211 GENEVA 23SWITZERLAND

Project:Sheet:

Module:European Organization

for Nuclear Research

4

EN/ICE

GND

P2V5

GND

Y

Y

1

2

00

I0I1

1

MUX

ES

I0

I0I1

I1 33

Y

2I1

I03

Y2

1

0

GND

GND

GND

+

GND GND

Y1

A2

A

Y

3

0

3

A

Y

2

1

Y

OE

A

0

Y1

A2

A

Y

3

0

3

A

Y

2

1

Y

OE

A

0

GND

GND

GND

OE

A3

A1

A0

A2

Y1

Y0

Y2

Y3

OE

A3

A1

A0

A2

Y1

Y0

Y2

Y3

GND

GND